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[37.212.37.190]) by smtp.gmail.com with ESMTPSA id k16-20020adfe8d0000000b0022cd0c8c696sm6860581wrn.103.2022.10.09.11.14.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Oct 2022 11:14:10 -0700 (PDT) From: Siarhei Volkau Cc: Siarhei Volkau , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Vinod Koul , Greg Kroah-Hartman , Paul Cercueil , Thomas Bogendoerfer , Linus Walleij , Jiri Slaby , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-serial@vger.kernel.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH 0/8] MIPS: ingenic: Add support for the JZ4755 SoC Date: Sun, 9 Oct 2022 21:13:29 +0300 Message-Id: <20221009181338.2896660-1-lis8215@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Add preliminary support for boards based on the JZ4755 SoC from Ingenic. It is a low-power SoC with a MIPS32r1 core running at ~432 MHz, and has no FPU. The JZ4755 SoC is supposed to be newer than the JZ4725B SoC, but its internals are very close to each other. Also the Ingenic's kernel source tree calls JZ4755 as JZ4750D and JZ4725B as JZ4750L, this might mean that JZ4725B is a pin to pin compatible replacement for older JZ4725 (both are LQFP128) but belongs to newer generation JZ475x. Who knows? I guess Ingenic released their SoCs in the following order: JZ4720 (MXU ?) JZ4725 (MXU ?) JZ4730 (MXU ?) JZ4740 (MXU1 r1) JZ4750 (MXU1 r2) JZ4755 (MXU1 r2) JZ4725b (MXU1 r2) JZ4760 ... So JZ4755 DT is reusing many JZ4725B drivers because their support in mainline kernel appears earlier. Siarhei Volkau (8): dt-bindings: ingenic: Add support for the JZ4755 SoC MIPS: ingenic: add new machine type MACH_JZ4755 dt-bindings: clock: Add Ingenic JZ4755 CGU header clk: Add Ingenic JZ4755 CGU driver pinctrl: ingenic: JZ4755 minor bug fixes dmaengine: JZ4780: Add support for the JZ4755. serial: 8250/ingenic: Add support for the JZ4750/JZ4755 SoCs MIPS: ingenic: Add support for the JZ4755 SoC .../bindings/clock/ingenic,cgu.yaml | 2 + .../devicetree/bindings/dma/ingenic,dma.yaml | 1 + .../bindings/serial/ingenic,uart.yaml | 4 + arch/mips/boot/dts/ingenic/jz4755.dtsi | 439 ++++++++++++++++++ arch/mips/ingenic/Kconfig | 5 + drivers/clk/ingenic/Kconfig | 10 + drivers/clk/ingenic/Makefile | 1 + drivers/clk/ingenic/jz4755-cgu.c | 350 ++++++++++++++ drivers/dma/dma-jz4780.c | 8 + drivers/pinctrl/pinctrl-ingenic.c | 4 +- drivers/tty/serial/8250/8250_ingenic.c | 39 +- .../dt-bindings/clock/ingenic,jz4755-cgu.h | 49 ++ 12 files changed, 905 insertions(+), 7 deletions(-) create mode 100644 arch/mips/boot/dts/ingenic/jz4755.dtsi create mode 100644 drivers/clk/ingenic/jz4755-cgu.c create mode 100644 include/dt-bindings/clock/ingenic,jz4755-cgu.h