From patchwork Fri Sep 21 16:38:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 11626 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0344823E54 for ; Fri, 21 Sep 2012 16:39:05 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 9F011A19001 for ; Fri, 21 Sep 2012 16:39:03 +0000 (UTC) Received: by ieje10 with SMTP id e10so5340122iej.11 for ; Fri, 21 Sep 2012 09:39:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=wnMHTS1ogKZeq4yasR/o8DfaHsE9TbdGdIMGNilOtFA=; b=mS2YfkTCT5p3g+oOXgFdaYcK4xrvOeHiOhClpM8oKvcsicmZRb3lLBtP+5P1U508Hx 3tIUfotRAkd3fr+CISN5MIcw6p+QcvG8PBkxwOQbcps9YmpvdiOE6vST6zJz+Ufx9KYP Peoq9PnkCi4VQVgBAOyq3KCnXa9WvClB+Pn/9lIipn+9kYO14F+dZGO9E7v45Osc0CUy toLPl6hfChX+i1E/QbLeSC4Pn9py/SVHmplCn6h1GyxVh7tUxcaf0aiiitrMgAOpa+Ij dk0401CLMdwAuDXQroqpKwQ0hqF+jXsvZrFY61sXQEK49jxIMFEfXbZtpP6wSSZWDmaI Y6RQ== Received: by 10.50.242.3 with SMTP id wm3mr2264243igc.0.1348245542691; Fri, 21 Sep 2012 09:39:02 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.184.232 with SMTP id ex8csp138107igc; Fri, 21 Sep 2012 09:39:01 -0700 (PDT) Received: by 10.14.203.69 with SMTP id e45mr7015796eeo.23.1348245540503; Fri, 21 Sep 2012 09:39:00 -0700 (PDT) Received: from eu1sys200aog119.obsmtp.com (eu1sys200aog119.obsmtp.com [207.126.144.147]) by mx.google.com with SMTP id 42si2141525eee.60.2012.09.21.09.38.50 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Sep 2012 09:39:00 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.147 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.147; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.147 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob119.postini.com ([207.126.147.11]) with SMTP ID DSNKUFyYGBJcSvc1hahHo6/87NruAjQZOQ6n@postini.com; Fri, 21 Sep 2012 16:38:59 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A4711A1; Fri, 21 Sep 2012 16:30:29 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8C50BAD9; Fri, 21 Sep 2012 16:38:43 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 2E811A8074; Fri, 21 Sep 2012 18:38:36 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 21 Sep 2012 18:38:42 +0200 From: Linus Walleij To: , Greg Kroah-Hartman Cc: , Anmar Oueja , Linus Walleij , , Bibek Basu , Par-Gunnar Hjalmdahl , Guillaume Jaunet , Christophe Arnal , Matthias Locher , Rajanikanth HV Subject: [PATCH] serial: pl011: handle corruption at high clock speeds Date: Fri, 21 Sep 2012 18:38:31 +0200 Message-ID: <1348245511-13732-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQljZCAh625vs32qadi2ZD7VZX0RnI4cDzSE58PF5KgCgSM1heEhLoyd4nGx1+gIhVty9Ilc From: Linus Walleij This works around a few glitches in the ST version of the PL011 serial driver when using very high baud rates, as we do in the Ux500: 3, 3.25, 4 and 4.05 Mbps. Problem Observed/rootcause: When using high baud-rates, and the baudrate*8 is getting close to the provided clock frequency (so a division factor close to 1), when using bursts of characters (so they are abutted), then it seems as if there is not enough time to detect the beginning of the start-bit which is a timing reference for the entire character, and thus the sampling moment of character bits is moving towards the end of each bit, instead of the middle. Fix: Increase slightly the RX baud rate of the UART above the theoretical baudrate by 5%. This will definitely give more margin time to the UART_RX to correctly sample the data at the middle of the bit period. Also fix the ages old copy-paste error in the very stressed comment, it's referencing the registers used in the PL010 driver rather than the PL011 ones. Cc: stable@kernel.org Cc: Bibek Basu Cc: Par-Gunnar Hjalmdahl Signed-off-by: Guillaume Jaunet Signed-off-by: Christophe Arnal Signed-off-by: Matthias Locher Signed-off-by: Rajanikanth HV Signed-off-by: Linus Walleij --- This patch fell off the earlier patch series so better send it alone as it should go into stable. --- drivers/tty/serial/amba-pl011.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index d626d84..cb9f694 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -1594,13 +1594,26 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, old_cr &= ~ST_UART011_CR_OVSFACT; } + /* + * Workaround for the ST Micro oversampling variants to + * increase the bitrate slightly, by lowering the divisor, + * to avoid delayed sampling of start bit at high speeds, + * else we see data corruption. + */ + if (uap->vendor->oversampling) { + if (baud > 3000000 && baud < 3250000 && quot > 1) + quot -= 1; + else if (baud > 3250000 && quot > 2) + quot -= 2; + } /* Set baud rate */ writew(quot & 0x3f, port->membase + UART011_FBRD); writew(quot >> 6, port->membase + UART011_IBRD); /* * ----------v----------v----------v----------v----- - * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L + * NOTE: lcrh_tx and lcrh_rx MUST BE WRITTEN AFTER + * UART011_FBRD & UART011_IBRD. * ----------^----------^----------^----------^----- */ writew(lcr_h, port->membase + uap->lcrh_rx);