From patchwork Fri May 24 15:30:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 165125 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp3746100ili; Fri, 24 May 2019 08:30:58 -0700 (PDT) X-Google-Smtp-Source: APXvYqxs5HIsB68IyJFBxjxuoQODXuG2CmZC89OiQnjoadmtkvAD2aOTPvhld6DMkL5OChn1DP5z X-Received: by 2002:aa7:8296:: with SMTP id s22mr114736676pfm.52.1558711858594; Fri, 24 May 2019 08:30:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558711858; cv=none; d=google.com; s=arc-20160816; b=AJKMsrqX+eTUhncF/nccX9LikU4FnspVCbSg5wEb18RumYYR0dR6tP7+KlmWIq1qWp ikIeoN2F0NKBnVLqWjJRMKlFixGQ3Msad1jowLGDsyOUEbSOcgjW6Hq9iqeOqtVScB4s IRByoqT1YoAF3a19gEJadaPevXxRMDIzgCnj68F23ak6m78WwCPJyt9DztlnSxq2oZ6E SzufP3TVOyO6q0mL+qSZPbXPxLHWeACItM/okUQ0pXi0a3cRGRWm5uW3Y13hjLytZiT4 9r3DKP+DqbGHFOcIYzysx2F07XzQDXHUb1YFkoex9/CaDQ0cD8GL3PCWjHjENZn7ejnM mXjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=1jp/DW/DgqpUMUcqYc9weRdFKoeCB+M0/u6IuMnuZB0=; b=JVB2Vn33f686dQ0icdk5ZwQREWnYKynzQvse/UV1NLRGoavoYF2DhQ+SDk3BqN1JBz du9r1BOg7VAXYKObXX/kDzBCxZwSXm9gV5TS+IettuvA6g8TVJCPJJjg0ZikYmru8hxX FaSVZd38ZGBne4TKmgiyQN8h2DYbs8j2ml0qXEHU0Zio5o7ftMSRZG2wjeBPu6Fm/soG JUDJXoWYHiZlvN6Uz86Tgu8TmklTzUU65Ol+/YcOkTlF5KstCQpPaSbAjNBlvEsTcXI6 2eyfHebmNLDFifuiu8E7cqLt46/+fpNrppA8hlKSw8GXUxbPRN6avadJf2uElWRzXyUr 3ReQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=Zqi5Vc3c; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 35si4761595plb.228.2019.05.24.08.30.58; Fri, 24 May 2019 08:30:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=Zqi5Vc3c; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389405AbfEXPa6 (ORCPT + 1 other); Fri, 24 May 2019 11:30:58 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:4878 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389292AbfEXPa5 (ORCPT ); Fri, 24 May 2019 11:30:57 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4OFIB91024824; Fri, 24 May 2019 17:30:45 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=1jp/DW/DgqpUMUcqYc9weRdFKoeCB+M0/u6IuMnuZB0=; b=Zqi5Vc3ciXeUwWx7S/qnN197gWTBLlvJTqRrEdNRIJJxf2gy+di8qVVOwKQakb5woNjw G0RHy5e9QmZJWlPzPQvPJxT7KryOYynxtpgyEyotHjDDGmrFyH72jlc9CelhyYydTZEF rKzwyHLmJceahzT1NY2oc5oeCz/3wC/UKhPFc+Y/jUJ9F+Eg6Cr/zePVN8Y9MmlZWOoZ zJK69FVGQa5y8hzzGFtEQ6yFlqOPo1pAht76WBxG18Kr5hCqbHgBIBjUD4VVDig0cfRv +3JkzT9Uz/u/+hVFUGOTQjSqZp+JkCjthLsoPVgn1XX6YcThLhMgTQuj5LvePsNlZY6P Gw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2sj774pguq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 24 May 2019 17:30:45 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4B37931; Fri, 24 May 2019 15:30:44 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1BED24FB9; Fri, 24 May 2019 15:30:44 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.46) by Safex1hubcas22.st.com (10.75.90.92) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 24 May 2019 17:30:43 +0200 Received: from localhost (10.201.23.31) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 24 May 2019 17:30:43 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue CC: , , , , , Fabrice Gasnier , Erwan Le Ray Subject: [PATCH 1/1] dt-bindings: stm32: serial: Add optional reset Date: Fri, 24 May 2019 17:30:38 +0200 Message-ID: <1558711838-21174-1-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-24_06:, , signatures=0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org STM32 serial can be reset via reset controller. Add an optional reset property to stm32 usart bindings. Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt index 9d3efed..a6b1948 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt @@ -13,6 +13,7 @@ Required properties: - clocks: The input clock of the USART instance Optional properties: +- resets: Must contain the phandle to the reset controller. - pinctrl: The reference on the pins configuration - st,hw-flow-ctrl: bool flag to enable hardware flow control. - rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,