From patchwork Tue Jun 4 08:55:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 165727 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp5576446ili; Tue, 4 Jun 2019 02:12:23 -0700 (PDT) X-Google-Smtp-Source: APXvYqyQmnHgptOpMcQ+PyNMdTMbvcCumzNGj9LGwFZ1yNyepEyH78jF9tCLgxh9t7V40n/n/iCd X-Received: by 2002:a17:90a:a10f:: with SMTP id s15mr36306166pjp.30.1559639543366; Tue, 04 Jun 2019 02:12:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559639543; cv=none; d=google.com; s=arc-20160816; b=fgegOqrZf89w7A4GdglRUPcAKibQqRIAeHnW1iHISYGdbrpR3N2rhccVDp9lT8kK3D qTD+CwvqsRAwre+9v8qrnfamQG/EJqrT7bw9bwn/eaep5ZbuJ/lBhzfCtuP4R0KSwNyt jndWsZbDBK3m4uqlKMFvJQdmJ/YUaJkJpZqqjs9U71naGBGT9dl6RF2XdXdIzPc+4tMZ guX0cWjzzbnPaaNmDgGoDnA99lWm7r5mKnKfF4rMv02SFFNAG2nTy+RlY5KtDwd23nQz s0XNaWSNpXn5GIDp7xCfIQXdri+2EDpTHfNQnW5gDiItJBG8Ya20NMrMrkVqu65/VOUc B/zQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=BOBDKvc6/9zpoCyHuQ4fAwfmcAT6M0AIxJdMmDR7DFDC9oIx3Hna4zt/G9tIQ3/uNc VkcIJ0LyZFIk4mI8uUdZHc2EkfmRSBB9Amqhgzpj3NqzeIEKSmdpxtvMTxQIH+bo0m7P IszBL8QEm3F5k1iQZIE6pn15hoMs5YtoHJGV7ujnt9DYD6xnPnRvrUoPWCiJ57BG1Ufz drYFZldk7KZA4YV+f7gNWxRFbvDz4xMTZP1jf+fM8/8uk9ZAWzecv/dRQL9kNFzpkMft dytss0h+zbNvXh53ZsRjRic1mAzGrDkvn8d3+Mlgn3yTD66Y/xUvEw4+0yZcnYOSNC5N J+4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=SpEMvvWc; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e11si7837957pjw.39.2019.06.04.02.12.23; Tue, 04 Jun 2019 02:12:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=SpEMvvWc; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726937AbfFDJMW (ORCPT + 1 other); Tue, 4 Jun 2019 05:12:22 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:1798 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726877AbfFDJMW (ORCPT ); Tue, 4 Jun 2019 05:12:22 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5498m8l019440; Tue, 4 Jun 2019 11:12:09 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=SpEMvvWcUnePXF+45Bix5UMA9ew3+AtsyZG9D1f4bqvRi04RA4ma6HaJp2oFc8jVi4Vu qnxjdWdnoK31qOFC1K9oPPJtmOcKtADkTIyX+h0LfN9zvTt865gX4nphqIXmO+nFJWYB ACVwhSUN3WTbi0o0UD6RvU0J+LLKYJYu2askkTg7JI9MYLIUhrFqhFzN8d6sgFSMWHrC Q6ABZAkkFhbeHzbEmWsuCfxWAfYnp8XOIO+M3MYGyEOqFbGzYepdQJdxi+GUiDRq9WwJ oSR02A3G4y0h8R6sVbUp/RkZiIckvq0V3VBTZ1UmRBt99+EOURN5JG3vDNfC0cBxyGK+ tQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2sunmefknd-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 04 Jun 2019 11:12:09 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7BB731A0; Tue, 4 Jun 2019 08:55:43 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 09829250B; Tue, 4 Jun 2019 08:55:42 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 4 Jun 2019 10:55:42 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 4 Jun 2019 10:55:41 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH 07/10] ARM: dts: stm32: update uart4 pin configurations for low power Date: Tue, 4 Jun 2019 10:55:16 +0200 Message-ID: <1559638519-6128-8-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1559638519-6128-1-git-send-email-erwan.leray@st.com> References: <1559638519-6128-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-04_07:, , signatures=0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Currently, pinctrl states defines only one "sleep" configuration for pins, no matter the possible uart low power modes (Rx pin always kept active). Sleep pin configuration is refined for low power modes: - "sleep" (no wakeup & console suspend enabled): put pins in analog state to optimize power - "idle" (wakeup capability): keep Rx pin in alternate function - "default" state remains untouched, to be used while the UART is active or in case the no_console_suspend mode is enabled Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 85c417d..2e1ab1b 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -599,6 +599,23 @@ bias-disable; }; }; + + uart4_idle_pins_a: uart4-idle-0 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4-sleep-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; }; pinctrl_z: pin-controller-z@54004000 {