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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Mar 2022 09:04:17.7016 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8df0955-e2c5-4a94-020b-08da0d7546ea X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5402 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: kartik In the current error handling sequence the driver checks for break error at the end. By handling the break error first, we can avoid a situation where the driver keeps processing the errors which can be caused by an unhandled break error. Signed-off-by: kartik --- drivers/tty/serial/serial-tegra.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index b6223fa..ba78a02 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -440,7 +440,19 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup, char flag = TTY_NORMAL; if (unlikely(lsr & TEGRA_UART_LSR_ANY)) { - if (lsr & UART_LSR_OE) { + if (lsr & UART_LSR_BI) { + /* + * Break error + * If FIFO read error without any data, reset Rx FIFO + */ + if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE)) + tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR); + if (tup->uport.ignore_status_mask & UART_LSR_BI) + return TTY_BREAK; + flag = TTY_BREAK; + tup->uport.icount.brk++; + dev_dbg(tup->uport.dev, "Got Break\n"); + } else if (lsr & UART_LSR_OE) { /* Overrrun error */ flag = TTY_OVERRUN; tup->uport.icount.overrun++; @@ -454,18 +466,6 @@ static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup, flag = TTY_FRAME; tup->uport.icount.frame++; dev_dbg(tup->uport.dev, "Got frame errors\n"); - } else if (lsr & UART_LSR_BI) { - /* - * Break error - * If FIFO read error without any data, reset Rx FIFO - */ - if (!(lsr & UART_LSR_DR) && (lsr & UART_LSR_FIFOE)) - tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_RCVR); - if (tup->uport.ignore_status_mask & UART_LSR_BI) - return TTY_BREAK; - flag = TTY_BREAK; - tup->uport.icount.brk++; - dev_dbg(tup->uport.dev, "Got Break\n"); } uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag); }