| Message ID | 169212d1c028170fa0f3c016a9bbea14d5f3be82.1732030972.git.Ryan.Wanner@microchip.com |
|---|---|
| State | New |
| Headers | show
Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5EA21D151B; Tue, 19 Nov 2024 16:41:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732034478; cv=none; b=udHeb7D3VOKLCVCYd2UJvi6hnMbFnY/SAC9c0G85Ar26dsVYft8AzUPtCff8eCYjXuDaXt6mYB4I+VWvwGO8Aqvx8E4YC1gxMuTRiA6ugDPF8UxV5lnPu+DOEPlzeLo5qhADyez5+VEBq5laAarOT2GWrI5lLrheYb9aSvTIawA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732034478; c=relaxed/simple; bh=r6DfrRrJUz/VWiH9PRUStqLSEGDRHm/bFZV1+oMNT70=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ejGd4ho4l4swzlBijSzP1SUlOmUwVq252NrbuV7kExQxqDdCOfxUnSSzsjjg49sSuRD4FcjAYn6cnZKwcwNisZ1KeJ02H4HvmpZLZX6qDl0RqVHX0AKwAe8LBdajqiVbSfbKeTdy4VafGjKWx7gA8PTmqThT2gHmJaqejy8y+6o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=sWSUYqhf; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="sWSUYqhf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1732034477; x=1763570477; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r6DfrRrJUz/VWiH9PRUStqLSEGDRHm/bFZV1+oMNT70=; b=sWSUYqhfha9cgP3DH7yVFP4luCYp9eNM1gQP38oYeoWxq2mVLlCmy3Zk lAnbJKT4uaV6BO926a/QQqeQNmEjqarNd1n5n8lk9WjGA7eGisv36CAvB +OuEYMvDRuxyNROcJ53+cxnlmKLuKfyeYgBYe/bNf7nlVo81lTH5ZBqWP 9uHtC5IB3HTx+4Njvpwsr2AoCxAlj9t2+L3F/18LAHK9cT1vgT7a1YZSi 2fyFQM8WREUuFOkEPVuJyaPLorohSyEhxcGo8Kl7pkfUQn86o8JCQniKL QtD+b3Mru6C0V1XSe5l31eSSCTwI7pTOaNOWy4/Yes4STc+MG5Rigqg2j w==; X-CSE-ConnectionGUID: jnnvkeRdTYaD0RwnHEXOug== X-CSE-MsgGUID: PIsdtI58TTS6LHqafY9Rqw== X-IronPort-AV: E=Sophos;i="6.12,166,1728975600"; d="scan'208";a="35018893" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 19 Nov 2024 09:41:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 19 Nov 2024 09:40:54 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 19 Nov 2024 09:40:54 -0700 From: <Ryan.Wanner@microchip.com> To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@tuxon.dev>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <arnd@arndb.de> CC: <dharma.b@microchip.com>, <mihai.sain@microchip.com>, <romain.sioen@microchip.com>, <varshini.rajendran@microchip.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-serial@vger.kernel.org> Subject: [PATCH 06/15] dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl Date: Tue, 19 Nov 2024 09:40:12 -0700 Message-ID: <169212d1c028170fa0f3c016a9bbea14d5f3be82.1732030972.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <cover.1732030972.git.Ryan.Wanner@microchip.com> References: <cover.1732030972.git.Ryan.Wanner@microchip.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: <linux-serial.vger.kernel.org> List-Subscribe: <mailto:linux-serial+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-serial+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain |
| Series |
Add support for SAMA7D65
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expand
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diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt index 774c3c269c40..a7d7d2eaf10f 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt @@ -6,6 +6,7 @@ configure it. Required properties: - compatible: "atmel,sama5d2-pinctrl" + "microchip,sama7d65-pinctrl" "microchip,sama7g5-pinctrl" - reg: base address and length of the PIO controller. - interrupts: interrupt outputs from the controller, one for each bank.