From patchwork Sat Nov 18 03:38:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 745343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87493C47071 for ; Sat, 18 Nov 2023 03:39:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346440AbjKRDjn (ORCPT ); Fri, 17 Nov 2023 22:39:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346433AbjKRDjl (ORCPT ); Fri, 17 Nov 2023 22:39:41 -0500 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CC85D7A for ; Fri, 17 Nov 2023 19:39:38 -0800 (PST) Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-5c184b3bbc4so2022520a12.1 for ; Fri, 17 Nov 2023 19:39:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1700278778; x=1700883578; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lUknxwWYXkt9C2M9pb/Z3CUGPfJIBZQMgmHAhH/xaf8=; b=IHinz0gC9R+tzPymiH/JYDJhkA1wbhQAUTXtmV8pyHSzPlZAcwIeDTK5Fi0FYCDuFY BPf7XkCaBf4DpJeDsDjEEyjA6mxsD7olqrLUy63PqC8wKgBRbjQhJ+U3dC0EXS5Dj/6n OHsJFVQFL1HfPjTBhISf7TH4K/0T1eJX1ZuZn/VUggTkINKUWUuljbxT9/E39owHOTJl 6wcinfSZw9yz+cAX28qCKoGn54+4TpNa0HwpYgtOpgNnKwRWJPRiJA5lF8du9u/jpLeN id4pvq9Ju4CZfzrqJZQ1tBRXiELsF4fxDCVm/h798hhGQo6dFnUJx2fbUclpc/0jQjxv e69w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700278778; x=1700883578; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lUknxwWYXkt9C2M9pb/Z3CUGPfJIBZQMgmHAhH/xaf8=; b=PTyQ0dg9XlLpw3tOFZD3DNxyLECppdMPIaeVBZD0pSUUGQbeCOE2dqQgsvDgiqEICh 1yoYGvuEBpVc96ZMFTitsTxYRNp31/dbww9iWz7St02EwKpuk4Y95aU3QxF3jBpyixOR r07QtrSacPJdet5dd/CSMfHC7//1r1qcum4GYKj8rObNPGw8uSEm0Nocv2G0usptdrf+ byLzIxOrHFkR4VH3ox3yXLShqRScSZFf0itvqekwqdaMZb7HtXTcEU1r6Sy8IUWSKSe3 mZrEocmPpj1nUrzHByaBWTVFDGQ0Qb1mvX9theDxBsw54fMgN9sHMFopihKH2HFORya4 A98Q== X-Gm-Message-State: AOJu0YxomGBp+0NwHPK2ahuQ/Hbv2HyfkYMU4nzIj3+8ECDIrSR1PWov iw1EgceDPq1saaNyoTMK3ymv/A== X-Google-Smtp-Source: AGHT+IGETYioNALUjNhz6JIS+eO7DP/jwO69X1kH6NZN6oXPpq2gEGKYxgt01iCN0WIJkFYPAiCO9A== X-Received: by 2002:a17:90b:1e02:b0:27d:7887:ddc5 with SMTP id pg2-20020a17090b1e0200b0027d7887ddc5mr1729418pjb.32.1700278778017; Fri, 17 Nov 2023 19:39:38 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.80.108]) by smtp.gmail.com with ESMTPSA id cz8-20020a17090ad44800b00280fcbbe774sm2053823pjb.10.2023.11.17.19.39.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Nov 2023 19:39:37 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Greg Kroah-Hartman , Jiri Slaby Cc: Conor Dooley , Andrew Jones , linux-riscv@lists.infradead.org, linux-serial@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Anup Patel Subject: [PATCH v4 2/5] RISC-V: Add SBI debug console helper routines Date: Sat, 18 Nov 2023 09:08:56 +0530 Message-Id: <20231118033859.726692-3-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231118033859.726692-1-apatel@ventanamicro.com> References: <20231118033859.726692-1-apatel@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Let us provide SBI debug console helper routines which can be shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/sbi.h | 5 +++++ arch/riscv/kernel/sbi.c | 43 ++++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 66f3933c14f6..ee7aef5f6233 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -334,6 +334,11 @@ static inline unsigned long sbi_mk_version(unsigned long major, } int sbi_err_map_linux_errno(int err); + +extern bool sbi_debug_console_available; +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr); +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr); + #else /* CONFIG_RISCV_SBI */ static inline int sbi_remote_fence_i(const struct cpumask *cpu_mask) { return -1; } static inline void sbi_init(void) {} diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index 5a62ed1da453..73a9c22c3945 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -571,6 +571,44 @@ long sbi_get_mimpid(void) } EXPORT_SYMBOL_GPL(sbi_get_mimpid); +bool sbi_debug_console_available; + +int sbi_debug_console_write(unsigned int num_bytes, phys_addr_t base_addr) +{ + struct sbiret ret; + + if (!sbi_debug_console_available) + return -EOPNOTSUPP; + + if (IS_ENABLED(CONFIG_32BIT)) + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, + num_bytes, lower_32_bits(base_addr), + upper_32_bits(base_addr), 0, 0, 0); + else + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE, + num_bytes, base_addr, 0, 0, 0, 0); + + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value; +} + +int sbi_debug_console_read(unsigned int num_bytes, phys_addr_t base_addr) +{ + struct sbiret ret; + + if (!sbi_debug_console_available) + return -EOPNOTSUPP; + + if (IS_ENABLED(CONFIG_32BIT)) + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ, + num_bytes, lower_32_bits(base_addr), + upper_32_bits(base_addr), 0, 0, 0); + else + ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ, + num_bytes, base_addr, 0, 0, 0, 0); + + return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value; +} + void __init sbi_init(void) { int ret; @@ -612,6 +650,11 @@ void __init sbi_init(void) sbi_srst_reboot_nb.priority = 192; register_restart_handler(&sbi_srst_reboot_nb); } + if ((sbi_spec_version >= sbi_mk_version(2, 0)) && + (sbi_probe_extension(SBI_EXT_DBCN) > 0)) { + pr_info("SBI DBCN extension detected\n"); + sbi_debug_console_available = true; + } } else { __sbi_set_timer = __sbi_set_timer_v01; __sbi_send_ipi = __sbi_send_ipi_v01;