| Message ID | 20240530154553.v2.1.Ife7ced506aef1be3158712aa3ff34a006b973559@changeid |
|---|---|
| State | Superseded |
| Headers | show |
| Series | serial: qcom-geni: Overhaul TX handling to fix crashes/hangs | expand |
On Thu, May 30, 2024 at 03:45:53PM GMT, Douglas Anderson wrote: > For UART devices the M_GP_LENGTH is the TX word count. For other > devices this is the transaction word count. > > For UART devices the S_GP_LENGTH is the RX word count. > > The IRQ_EN set/clear registers allow you to set or clear bits in the > IRQ_EN register without needing a read-modify-write. > Acked-by: Bjorn Andersson <andersson@kernel.org> Regards, Bjorn > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > Since these new definitions are used in the future UART patches the > hope is that they could be acked by Qualcomm folks and then go through > the same tree as the UART patches that need them. > > Changes in v2: > - New > > include/linux/soc/qcom/geni-se.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h > index 0f038a1a0330..8d07c442029b 100644 > --- a/include/linux/soc/qcom/geni-se.h > +++ b/include/linux/soc/qcom/geni-se.h > @@ -88,11 +88,15 @@ struct geni_se { > #define SE_GENI_M_IRQ_STATUS 0x610 > #define SE_GENI_M_IRQ_EN 0x614 > #define SE_GENI_M_IRQ_CLEAR 0x618 > +#define SE_GENI_M_IRQ_EN_SET 0x61c > +#define SE_GENI_M_IRQ_EN_CLEAR 0x620 > #define SE_GENI_S_CMD0 0x630 > #define SE_GENI_S_CMD_CTRL_REG 0x634 > #define SE_GENI_S_IRQ_STATUS 0x640 > #define SE_GENI_S_IRQ_EN 0x644 > #define SE_GENI_S_IRQ_CLEAR 0x648 > +#define SE_GENI_S_IRQ_EN_SET 0x64c > +#define SE_GENI_S_IRQ_EN_CLEAR 0x650 > #define SE_GENI_TX_FIFOn 0x700 > #define SE_GENI_RX_FIFOn 0x780 > #define SE_GENI_TX_FIFO_STATUS 0x800 > @@ -101,6 +105,8 @@ struct geni_se { > #define SE_GENI_RX_WATERMARK_REG 0x810 > #define SE_GENI_RX_RFR_WATERMARK_REG 0x814 > #define SE_GENI_IOS 0x908 > +#define SE_GENI_M_GP_LENGTH 0x910 > +#define SE_GENI_S_GP_LENGTH 0x914 > #define SE_DMA_TX_IRQ_STAT 0xc40 > #define SE_DMA_TX_IRQ_CLR 0xc44 > #define SE_DMA_TX_FSM_RST 0xc58 > -- > 2.45.1.288.g0e0cd299f1-goog >
diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h index 0f038a1a0330..8d07c442029b 100644 --- a/include/linux/soc/qcom/geni-se.h +++ b/include/linux/soc/qcom/geni-se.h @@ -88,11 +88,15 @@ struct geni_se { #define SE_GENI_M_IRQ_STATUS 0x610 #define SE_GENI_M_IRQ_EN 0x614 #define SE_GENI_M_IRQ_CLEAR 0x618 +#define SE_GENI_M_IRQ_EN_SET 0x61c +#define SE_GENI_M_IRQ_EN_CLEAR 0x620 #define SE_GENI_S_CMD0 0x630 #define SE_GENI_S_CMD_CTRL_REG 0x634 #define SE_GENI_S_IRQ_STATUS 0x640 #define SE_GENI_S_IRQ_EN 0x644 #define SE_GENI_S_IRQ_CLEAR 0x648 +#define SE_GENI_S_IRQ_EN_SET 0x64c +#define SE_GENI_S_IRQ_EN_CLEAR 0x650 #define SE_GENI_TX_FIFOn 0x700 #define SE_GENI_RX_FIFOn 0x780 #define SE_GENI_TX_FIFO_STATUS 0x800 @@ -101,6 +105,8 @@ struct geni_se { #define SE_GENI_RX_WATERMARK_REG 0x810 #define SE_GENI_RX_RFR_WATERMARK_REG 0x814 #define SE_GENI_IOS 0x908 +#define SE_GENI_M_GP_LENGTH 0x910 +#define SE_GENI_S_GP_LENGTH 0x914 #define SE_DMA_TX_IRQ_STAT 0xc40 #define SE_DMA_TX_IRQ_CLR 0xc44 #define SE_DMA_TX_FSM_RST 0xc58
For UART devices the M_GP_LENGTH is the TX word count. For other devices this is the transaction word count. For UART devices the S_GP_LENGTH is the RX word count. The IRQ_EN set/clear registers allow you to set or clear bits in the IRQ_EN register without needing a read-modify-write. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- Since these new definitions are used in the future UART patches the hope is that they could be acked by Qualcomm folks and then go through the same tree as the UART patches that need them. Changes in v2: - New include/linux/soc/qcom/geni-se.h | 6 ++++++ 1 file changed, 6 insertions(+)