diff mbox series

[08/21] dt-bindings: clock: adi,sc5xx-clocks: add bindings

Message ID 20240912-test-v1-8-458fa57c8ccf@analog.com
State New
Headers show
Series Adding support of ADI ARMv8 ADSP-SC598 SoC. | expand

Commit Message

Arturs Artamonovs via B4 Relay Sept. 12, 2024, 6:24 p.m. UTC
From: Arturs Artamonovs <arturs.artamonovs@analog.com>

Add ADSP-SC5xx clock bindings.

Signed-off-by: Arturs Artamonovs <Arturs.Artamonovs@analog.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
---
 .../bindings/clock/adi,sc5xx-clocks.yaml           | 65 ++++++++++++++++++++++
 1 file changed, 65 insertions(+)

Comments

Rob Herring Sept. 13, 2024, 10:06 p.m. UTC | #1
On Thu, Sep 12, 2024 at 07:24:53PM +0100, Arturs Artamonovs wrote:
> Add ADSP-SC5xx clock bindings.
> 
> Signed-off-by: Arturs Artamonovs <Arturs.Artamonovs@analog.com>
> Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
> Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
> Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
> ---
>  .../bindings/clock/adi,sc5xx-clocks.yaml           | 65 ++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml b/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..a092ebdefdcf89a635cdcf1073921efd28a38386
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Clock Tree Drivers for Analog Devices ADSP-SC5XX Processors
> +
> +maintainers:
> +  - Arturs Artamonovs <arturs.artamonovs@analog.com>
> +  - Utsav Agarwal <Utsav.Agarwal@analog.com>
> +
> +description: |
> +  These drivers read in the processors CDU (clock distribution unit)
> +  and CGU (clock generation unit) values to determine various clock
> +  rates

That sounds like 2 h/w blocks, not 1. If so, the bindings should reflect 
that even if you want 1 driver to handle both.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml b/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..a092ebdefdcf89a635cdcf1073921efd28a38386
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/adi,sc5xx-clocks.yaml
@@ -0,0 +1,65 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/adi,sc5xx-clocks.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Clock Tree Drivers for Analog Devices ADSP-SC5XX Processors
+
+maintainers:
+  - Arturs Artamonovs <arturs.artamonovs@analog.com>
+  - Utsav Agarwal <Utsav.Agarwal@analog.com>
+
+description: |
+  These drivers read in the processors CDU (clock distribution unit)
+  and CGU (clock generation unit) values to determine various clock
+  rates
+
+properties:
+  compatible:
+    enum:
+      - adi,sc598-clocks # 64-Bit SC598 processor
+
+  '#clock-cells':
+    const: 1
+
+  reg:
+    minItems: 3
+    maxItems: 4
+
+  clocks:
+    description:
+      Specifies the CLKIN0 and CLKIN1 reference clock(s) from which the
+      output frequencies are derived via CDU+CGU
+    minItems: 2
+    maxItems: 2
+
+  clock-names:
+    description:
+      String reference names for CLKIN0 and CLKIN1
+    minItems: 2
+    maxItems: 2
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#clock-cells'
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    clk3: clocks@3108d000 {
+        compatible = "adi,sc598-clocks";
+        reg = <0x3108d000 0x1000>,
+              <0x3108e000 0x1000>,
+              <0x3108f000 0x1000>,
+              <0x310a9000 0x1000>;
+        #clock-cells = <1>;
+        clocks = <&sys_clkin0>, <&sys_clkin1>;
+        clock-names = "sys_clkin0", "sys_clkin1";
+        status = "okay";
+    };
+