| Message ID | 20250506180232.1299-2-quic_ptalari@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable QUPs and Serial on SA8255p Qualcomm platforms | expand |
Hi Krzysztof Thank you for your patience. I consider your inputs as valuable learning. On 5/6/2025 11:53 PM, Krzysztof Kozlowski wrote: > On 06/05/2025 20:02, Praveen Talari wrote: >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,sa8255p-geni-uart >> + - qcom,sa8255p-geni-debug-uart >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + minItems: 1 > Nothing changed here, this should be dropped based on previous discussion. > > You sent this v5 on 8:02 PM of my time. *THEN* you responded to my > comment at v4 at 8:05 PM. That's the way to waste everyone's time. > > I do not understand why interrupt is optional for a new, complete device > description. On this platform, there is no use case of waking up UART, so we consider the wake up IRQ as optional. Thanks, Praveen > > Best regards, > Krzysztof
Hi Krzysztof, Thank for you review and valuable inputs. On 5/8/2025 11:15 AM, Praveen Talari wrote: > Hi Krzysztof > > Thank you for your patience. I consider your inputs as valuable learning. > > On 5/6/2025 11:53 PM, Krzysztof Kozlowski wrote: >> On 06/05/2025 20:02, Praveen Talari wrote: >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - qcom,sa8255p-geni-uart >>> + - qcom,sa8255p-geni-debug-uart >>> + >>> + reg: >>> + maxItems: 1 >>> + >>> + interrupts: >>> + minItems: 1 >> Nothing changed here, this should be dropped based on previous >> discussion. >> >> You sent this v5 on 8:02 PM of my time. *THEN* you responded to my >> comment at v4 at 8:05 PM. That's the way to waste everyone's time. >> >> I do not understand why interrupt is optional for a new, complete device >> description. To put it simply, because we are using the RX GPIO line as wake up IRQ and not all SE related pins are mapped in the PDC, there is no specific wake-up pin to define. Therefore, the wake-up IRQ should be considered optional. Thanks, Praveen > > On this platform, there is no use case of waking up UART, so we > consider the wake up IRQ as optional. > > Thanks, > > Praveen > >> >> Best regards, >> Krzysztof
diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml new file mode 100644 index 000000000000..c939ddb4d253 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Geni based QUP UART interface + +maintainers: + - Praveen Talari <quic_ptalari@quicinc.com> + +allOf: + - $ref: /schemas/serial/serial.yaml# + +properties: + compatible: + enum: + - qcom,sa8255p-geni-uart + - qcom,sa8255p-geni-debug-uart + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: UART core irq + - description: Wakeup irq (RX GPIO) + + interrupt-names: + items: + - const: uart + - const: wakeup + + power-domains: + minItems: 2 + maxItems: 2 + + power-domain-names: + items: + - const: power + - const: perf + +required: + - compatible + - reg + - interrupts + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + serial@990000 { + compatible = "qcom,sa8255p-geni-uart"; + reg = <0x990000 0x4000>; + interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 35 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uart", "wakeup"; + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>; + power-domain-names = "power", "perf"; + }; +...