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Tue, 10 Jun 2025 02:22:41 -0700 (PDT) From: Yunhui Cui To: arnd@arndb.de, andriy.shevchenko@linux.intel.com, benjamin.larsson@genexis.eu, cuiyunhui@bytedance.com, gregkh@linuxfoundation.org, heikki.krogerus@linux.intel.com, ilpo.jarvinen@linux.intel.com, jirislaby@kernel.org, jkeeping@inmusicbrands.com, john.ogness@linutronix.de, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, markus.mayer@linaro.org, matt.porter@linaro.org, namcao@linutronix.de, paulmck@kernel.org, pmladek@suse.com, schnelle@linux.ibm.com, sunilvl@ventanamicro.com, tim.kryger@linaro.org Subject: [PATCH v9 3/4] serial: 8250: avoid potential PSLVERR issue Date: Tue, 10 Jun 2025 17:21:34 +0800 Message-Id: <20250610092135.28738-4-cuiyunhui@bytedance.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) In-Reply-To: <20250610092135.28738-1-cuiyunhui@bytedance.com> References: <20250610092135.28738-1-cuiyunhui@bytedance.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When the PSLVERR_RESP_EN parameter is set to 1, reading UART_RX while the FIFO is enabled and UART_LSR_DR is not set will generate a PSLVERR error. Failure to check the UART_LSR_DR before reading UART_RX, or the non- atomic nature of clearing the FIFO and reading UART_RX, poses potential risks that could lead to PSLVERR. PSLVERR is addressed through two methods. One is to introduce serial8250_discard_data() to check whether UART_LSR_DR is set before reading UART_RX, thus solving the PSLVERR issue when the FIFO is enabled. The other is to place FIFO clearing and reading of UART_RX under port->lock. Signed-off-by: Yunhui Cui --- drivers/tty/serial/8250/8250.h | 13 +++++++++++++ drivers/tty/serial/8250/8250_port.c | 26 +++++++++++++++----------- 2 files changed, 28 insertions(+), 11 deletions(-) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index 18530c31a5981..b3fb8a550db35 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -162,6 +162,19 @@ static inline u16 serial_lsr_in(struct uart_8250_port *up) return lsr; } +/* + * To avoid PSLVERR, check UART_LSR_DR in UART_LSR before + * reading UART_RX. + */ +static inline void serial8250_discard_data(struct uart_8250_port *up) +{ + u16 lsr; + + lsr = serial_in(up, UART_LSR); + if (lsr & UART_LSR_DR) + serial_in(up, UART_RX); +} + /* * For the 16C950 */ diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 07fe818dffa34..0560df9b064f9 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -764,8 +764,6 @@ static void disable_rsa(struct uart_8250_port *up) if (up->port.type == PORT_RSA && up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { - uart_port_lock_irq(&up->port); - mode = serial_in(up, UART_RSA_MSR); result = !(mode & UART_RSA_MSR_FIFO); @@ -777,7 +775,6 @@ static void disable_rsa(struct uart_8250_port *up) if (result) up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; - uart_port_unlock_irq(&up->port); } } #endif /* CONFIG_SERIAL_8250_RSA */ @@ -1353,9 +1350,8 @@ static void autoconfig_irq(struct uart_8250_port *up) /* Synchronize UART_IER access against the console. */ uart_port_lock_irq(port); serial_out(up, UART_IER, UART_IER_ALL_INTR); + serial8250_discard_data(up); uart_port_unlock_irq(port); - serial_in(up, UART_LSR); - serial_in(up, UART_RX); serial_in(up, UART_IIR); serial_in(up, UART_MSR); serial_out(up, UART_TX, 0xFF); @@ -2260,13 +2256,20 @@ int serial8250_do_startup(struct uart_port *port) * Clear the FIFO buffers and disable them. * (they will be reenabled in set_termios()) */ + uart_port_lock_irqsave(port, &flags); serial8250_clear_fifos(up); /* - * Clear the interrupt registers. + * Read UART_RX to clear interrupts (e.g., Character Timeout). + * To prevent PSLVERR, we can either disable the FIFO before reading + * UART_RX or read UART_RX only when UART_LSR_DR is set while the FIFO + * remains enabled. If using the latter approach to avoid PSLVERR, it + * creates a contradiction with the interrupt-clearing (see the + * rx_timeout handling in dw8250_handle_irq()). */ serial_port_in(port, UART_LSR); serial_port_in(port, UART_RX); + uart_port_unlock_irqrestore(port, flags); serial_port_in(port, UART_IIR); serial_port_in(port, UART_MSR); @@ -2423,15 +2426,13 @@ int serial8250_do_startup(struct uart_port *port) } } - uart_port_unlock_irqrestore(port, flags); - /* * Clear the interrupt registers again for luck, and clear the * saved flags to avoid getting false values from polling * routines or the previous session. */ - serial_port_in(port, UART_LSR); - serial_port_in(port, UART_RX); + serial8250_discard_data(up); + uart_port_unlock_irqrestore(port, flags); serial_port_in(port, UART_IIR); serial_port_in(port, UART_MSR); up->lsr_saved_flags = 0; @@ -2513,7 +2514,6 @@ void serial8250_do_shutdown(struct uart_port *port) port->mctrl &= ~TIOCM_OUT2; serial8250_set_mctrl(port, port->mctrl); - uart_port_unlock_irqrestore(port, flags); /* * Disable break condition and FIFOs @@ -2532,8 +2532,12 @@ void serial8250_do_shutdown(struct uart_port *port) /* * Read data port to reset things, and then unlink from * the IRQ chain. + * + * Since reading UART_RX clears interrupts, doing so with + * FIFO disabled won't trigger PSLVERR. */ serial_port_in(port, UART_RX); + uart_port_unlock_irqrestore(port, flags); serial8250_rpm_put(up); up->ops->release_irq(up);