From patchwork Thu Nov 3 15:55:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 4931 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 72CB923E06 for ; Thu, 3 Nov 2011 15:57:49 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 5F6AEA187D2 for ; Thu, 3 Nov 2011 15:57:49 +0000 (UTC) Received: by faan26 with SMTP id n26so2461193faa.11 for ; Thu, 03 Nov 2011 08:57:49 -0700 (PDT) Received: by 10.223.16.82 with SMTP id n18mr17315491faa.2.1320335762007; Thu, 03 Nov 2011 08:56:02 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.14.103 with SMTP id o7cs92751lac; Thu, 3 Nov 2011 08:56:01 -0700 (PDT) Received: by 10.14.14.15 with SMTP id c15mr977238eec.180.1320335759463; Thu, 03 Nov 2011 08:55:59 -0700 (PDT) Received: from eu1sys200aog113.obsmtp.com (eu1sys200aog113.obsmtp.com. [207.126.144.135]) by mx.google.com with SMTP id x41si1896634eef.165.2011.11.03.08.55.49 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 03 Nov 2011 08:55:59 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.135 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.135; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.135 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob113.postini.com ([207.126.147.11]) with SMTP; Thu, 03 Nov 2011 15:55:59 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id BF1C497; Thu, 3 Nov 2011 15:55:45 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 5E1EA70; Thu, 3 Nov 2011 15:55:45 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id 221E724C075; Thu, 3 Nov 2011 16:55:37 +0100 (CET) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Thu, 3 Nov 2011 16:55:44 +0100 From: Ulf Hansson To: Grant Likely , Cc: , Lee Jones , Ulf Hansson Subject: [PATCH V2] spi/pl022: Enable clock in probe Date: Thu, 3 Nov 2011 16:55:41 +0100 Message-ID: <1320335741-5309-1-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.5.4 MIME-Version: 1.0 Make sure we enable the clock before leaving probe. Signed-off-by: Ulf Hansson --- Changes in v2: -Remove runtime_idle --- drivers/spi/spi-pl022.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index f103e47..5559b22 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c @@ -2184,6 +2184,12 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) goto err_clk_prep; } + status = clk_enable(pl022->clk); + if (status) { + dev_err(&adev->dev, "could not enable SSP/SPI bus clock\n"); + goto err_no_clk_en; + } + /* Disable SSP */ writew((readw(SSP_CR1(pl022->virtbase)) & (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); @@ -2237,6 +2243,8 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) free_irq(adev->irq[0], pl022); err_no_irq: + clk_disable(pl022->clk); + err_no_clk_en: clk_unprepare(pl022->clk); err_clk_prep: clk_put(pl022->clk);