From patchwork Wed Oct 24 09:34:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keiji Hayashibara X-Patchwork-Id: 149486 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp354022ljp; Wed, 24 Oct 2018 02:34:53 -0700 (PDT) X-Google-Smtp-Source: AJdET5eD2ehjSYfKsyteBLdba7QqFDqFzL470fWfXWhZNgpk8n0X7fgvKs5eDQoy6x+qNRNTkQ37 X-Received: by 2002:a62:7a85:: with SMTP id v127-v6mr751476pfc.46.1540373693770; Wed, 24 Oct 2018 02:34:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1540373693; cv=none; d=google.com; s=arc-20160816; b=LXnzgtZvCdPtkiZSsDWpFIRjNe2ZmRKPZnCZHoL9kmTXHHm1Mjj0eLkCc7v7bo6ExR u3jqEfPZRDisSK26yw3IlR2uq4ZDqryMavgH5gx0+ZiB7Q5sdALEr9xZfyEXIViaLXWQ XHM8ZNWWc1MY5b3XRs+XPBHe08vYTUGhGdmKrl3LRDfGhg3R6b8wPiSRXbEWT4uE40G+ /o3Us3WrEmsJG3sBzF3K98l76Zk6jZGK95tqSZGvfEK97Dq/SeUc9+8AQ9wstGpdpA7F qeU7pGuGMzgCkQsEBRkBw5XjzXQKTk3tu2IwtzLGEWhotoNDwOLQMcCZP7cCNwGzxnhl /YIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=QHIu9OT03mBFKQQIIuxo5fLvNhy6bmhh1xGBrF6mgeA=; b=lajHD+1HhhMj6g/NcVs/Xf0WbcPLxPAU4x8UuthWpI1faXZRRd+WBv2M0UjO08725F QjLxnXmPBLqMDtFKBQsi0vNFHKwCLG1uBAwFyrvrklY0h2brmE9Vp7H0Q5gtbgvQid+b mtReFnRxPWfNiCAIORWu3OOWYesrjP1+tXWE+v7GNM19hQs4zm0HGia7jGbemrIkS4wX kNwfUqCzCz4C3nG9YERteurGHMb5pnOzNG2Fg0AuyhO5kuTxx9vGEfAnqFXFOAaPL3sr lAfe9e/OGEbZUylWpKLFegoOftV9sw+vTwNJzDWW+7sZZ+tZYkP7IGQqce+N1DeJ+hJT uT7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 207-v6si4288484pgb.298.2018.10.24.02.34.53; Wed, 24 Oct 2018 02:34:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726268AbeJXSCP (ORCPT + 1 other); Wed, 24 Oct 2018 14:02:15 -0400 Received: from mx.socionext.com ([202.248.49.38]:19496 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726258AbeJXSCO (ORCPT ); Wed, 24 Oct 2018 14:02:14 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 24 Oct 2018 18:34:50 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id E66691800F0; Wed, 24 Oct 2018 18:34:50 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Wed, 24 Oct 2018 18:34:50 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by iyokan.css.socionext.com (Postfix) with ESMTP id BE1034035C; Wed, 24 Oct 2018 18:34:50 +0900 (JST) Received: from hamster.e01.socionext.com (unknown [10.213.134.20]) by yuzu.css.socionext.com (Postfix) with ESMTP id 84C95120148; Wed, 24 Oct 2018 18:34:50 +0900 (JST) From: Keiji Hayashibara To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, yamada.masahiro@socionext.com, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: stable@vger.kernel.org, masami.hiramatsu@linaro.org, jaswinder.singh@linaro.org, linux-kernel@vger.kernel.org, hayashibara.keiji@socionext.com Subject: [PATCH] spi: uniphier: fix incorrect property items Date: Wed, 24 Oct 2018 18:34:29 +0900 Message-Id: <1540373669-18969-1-git-send-email-hayashibara.keiji@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This commit fixes incorrect property because it was different from the actual. The parameters of '#address-cells' and '#size-cells' were removed, and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added. Fixes: 4dcd5c2781f3 ("spi: add DT bindings for UniPhier SPI controller") Signed-off-by: Keiji Hayashibara --- Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt index 504a4ec..b04e66a 100644 --- a/Documentation/devicetree/bindings/spi/spi-uniphier.txt +++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt @@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel. Required properties: - compatible: should be "socionext,uniphier-scssi" - reg: address and length of the spi master registers - - #address-cells: must be <1>, see spi-bus.txt - - #size-cells: must be <0>, see spi-bus.txt - - clocks: A phandle to the clock for the device. - - resets: A phandle to the reset control for the device. + - interrupts: a single interrupt specifier + - pinctrl-names: should be "default" + - pinctrl-0: pin control state for the default mode + - clocks: a phandle to the clock for the device + - resets: a phandle to the reset control for the device Example: spi0: spi@54006000 { compatible = "socionext,uniphier-scssi"; reg = <0x54006000 0x100>; - #address-cells = <1>; - #size-cells = <0>; + interrupts = <0 39 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; clocks = <&peri_clk 11>; resets = <&peri_rst 11>; };