From patchwork Thu Jan 10 12:15:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 155135 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp1825713jaa; Thu, 10 Jan 2019 04:15:10 -0800 (PST) X-Google-Smtp-Source: ALg8bN43goUqCP4nGBPcxYOiZxlv1mX20ekayg5L4EFw9ILeOoGyTBYM37u5A28Z0VAoJ8fp5F6A X-Received: by 2002:a63:d547:: with SMTP id v7mr9014562pgi.339.1547122510936; Thu, 10 Jan 2019 04:15:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547122510; cv=none; d=google.com; s=arc-20160816; b=s3/+aSvDeutojynEzfHkbLQvdwok8b2n5ZOixtZOqSkkQQLjmR7Pp5wZlsIsh6sXDu VFpFxta3HpGQXFYrB1hm7nhkvhlSn+g7WcTdcl6ufB6sfVPHx+1FqGFw4ibuCCc0+xEA d7PvXcMAwCDCImkNHmuonsDIItbhVvJ2cD4PiDu5DVNUu60F6PltA4j7h0Eg1oLfsGs1 ucfDDlyCCYnRwRIA5P/Ygn0wWtYuf4zufsFuQeoeYQqiKCBeEMWkghQRNVFFa1lRvFN7 Qo7o6C/AvyZFJ3KBylbiKJtnUMh0fVVGnQLipNguwazn3q/duukKscmvQOn++4mxHfic YxgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=MlLtCmDcbH5nNEkEnU/NkwX+N13og6JNg3kr1P9qqL4=; b=0wTh6SCFibSjfNT4i5z9iwH4gKJy8cQ7HHMQqucwvnsDlBk4k8y75TPAWX9pQDPNz3 Lg+tSeE+mCWHX+WcXZYStUL7PpO8BibOL618KezOOMVJYAqOCg9slj96iZot1JjK2Zqf gwBbxOB2Q7IgA1LyHcO7YgbsF5IGeZ88jOD2l0/r/0ycOgvWj4XVqdG5goAAt79Med77 f4tg4i1x7z0Cy12U1KSCKKSbOYUz4QKDKEOYy6mdJfO7uKFugsf2CKStkuo8rSFkpnx9 vn3JF6N2fIapQaECAMZCPmzFQaHj1HmzUVny8kkYuCkOSBb/MY8AyU6CxwJvCTHjI9of 2Vyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KpoEYD4V; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 38si4372869pgx.460.2019.01.10.04.15.10; Thu, 10 Jan 2019 04:15:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KpoEYD4V; spf=pass (google.com: best guess record for domain of linux-spi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-spi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727860AbfAJMPK (ORCPT + 1 other); Thu, 10 Jan 2019 07:15:10 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:43987 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727849AbfAJMPK (ORCPT ); Thu, 10 Jan 2019 07:15:10 -0500 Received: by mail-lf1-f68.google.com with SMTP id u18so8110268lff.10 for ; Thu, 10 Jan 2019 04:15:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MlLtCmDcbH5nNEkEnU/NkwX+N13og6JNg3kr1P9qqL4=; b=KpoEYD4VD4gGwKm8SVK6XKDPr1n4cYfYuMFCEcifEPzHtQ+L/XwkwEDnUklJV+8uEh lvKmdYXKbD6R3ZFHd8a9VWNE+NMsAFZ56k+tXC1E8tcWiVVeZEK2Plye4aZC/58Oc6VO jcoJK0iCwvJeAZGc4zbvJptTaYbI+QB4H1muI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MlLtCmDcbH5nNEkEnU/NkwX+N13og6JNg3kr1P9qqL4=; b=IvYBZtbJL/nNcAwU1FD9B7PLBYIbhV2ldNOkie6/4zVHR0HqGeWZjeXa55uO1XFrgA X6oah5NVCiOWDPQ8+D+5CGn5O7//+2cygUclHfRdmSQREkqdR/3B6TZiIqcqVp0VNbPl ERj/0kKx+3iB37CKzijSTo6ElaXC0W49IYaBFcP+PvHnDdz1v83kdqRLu9je94/gVGQe INaPPGDnJSkWF4hC0GZSqR6qjljC1ZxLlibasOlUHB7zzolJiDaYlYItVK8cyAIZuZYH ANwnA/osyX3wqO/kIf0mrHNgSWHYs8YtTwF5IKRV+G4QVeoA93svtauC+f3mBc0srb3M w2oQ== X-Gm-Message-State: AJcUukfb1LWp2GhuviOBZ2Uk+z+A5sywWVisIRhTZizJDnB3Y40N6ATI pHcYcr7MOxYuxby999ICy4BTBw== X-Received: by 2002:a19:a104:: with SMTP id k4mr5889921lfe.36.1547122507908; Thu, 10 Jan 2019 04:15:07 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id d24-v6sm15141282ljg.2.2019.01.10.04.15.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Jan 2019 04:15:06 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Janek Kotas Subject: [PATCH] spi: Support high CS when using descriptors Date: Thu, 10 Jan 2019 13:15:03 +0100 Message-Id: <20190110121503.25436-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org All controllers using GPIO descriptors can by definition support high CS connections, so just enforce this when registering an SPI controller. This fixes a regression where controllers were missing SPI_CS_HIGH, the drivers would fail like this: spi spi0.0: setup: unsupported mode bits 4 cdns-spi fd0b0000.spi: can't setup spi0.0, status -22 This is because as using descriptors moves the CS inversion logic over to gpiolib, all such controllers are registered with CS active high. Cc: Janek Kotas Reported-by: Janek Kotas Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs") Signed-off-by: Linus Walleij --- Janek, it'd be great if you could test this patch and confirm that it makes the DW driver tick again. --- drivers/spi/spi.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.19.2 diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 06b9139664a3..31696f2fc8d5 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2336,6 +2336,11 @@ int spi_register_controller(struct spi_controller *ctlr) status = spi_get_gpio_descs(ctlr); if (status) return status; + /* + * A controller using GPIO descriptors always + * supports SPI_CS_HIGH if need be. + */ + ctlr->mode_bits |= SPI_CS_HIGH; } else { /* Legacy code path for GPIOs from DT */ status = of_spi_register_master(ctlr);