From patchwork Sat Nov 7 08:14:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 321831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8794C5DF9D for ; Sat, 7 Nov 2020 08:15:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 93DD520704 for ; Sat, 7 Nov 2020 08:15:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="fb3oXHC6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727860AbgKGIPg (ORCPT ); Sat, 7 Nov 2020 03:15:36 -0500 Received: from esa3.hgst.iphmx.com ([216.71.153.141]:57208 "EHLO esa3.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727801AbgKGIPg (ORCPT ); Sat, 7 Nov 2020 03:15:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1604736935; x=1636272935; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R6ojcjfpOV1mQTShcVKl24jzRG2DzI4ILkhh1fxkrVo=; b=fb3oXHC6aUwRST9LZNaU/4uyfHIlkdN9hMqwE8wZ3xMwA6tZATMzWq/B 092vQlVUBP8g0mki3ORjk61DRsa0jOyfSDeBWVVxd1O07K7QzdUB6DHwI AF8VyVy40VBFKfEYN+FEHp4elYHqGVvai5n79QvTIlgwGEPeD8BEa4dyU zK59usoz0/1WAKQofrUo0U8HoMFXSGd7/D1vOAcXJmhaQUq/u53e77kpS iBkQJux2jKIslAGy3L2A082xrlfHXAFr+PrFl+TnSpVpHLRSc5sUcHQGz 1XKw6cYWmLJeP9fciu+Fy6GO5o0j81Wd/LsM610xaqfU3aHqzPUmvIjWy Q==; IronPort-SDR: i1tUvOnLH97xQSflAWOSTLMzVCqwZTdeZLd3RnENWhmfUavxRx/zDWp3Vn/5SPs6hwQSVvjRkN JDouJL7ty7/hvjnvFeqVVh/hB9TjwW1an+sWVlZKTYom8ZOACfprB7Qpy41sZYYjZ9MqcQ2Gv/ G/qT/4XsCGYTBZnE/O6NWrvzaGgEM0uTwUigrOrs9NvPSIwhVY80wjgtWNGKlh173Co3fswe7I sfkECBpQuuDUFQlzzgF8bN7PWZ8G2sPiTm1RIYmdAh0ixoKQ1u1KoBwwTuYdu+8Th3bCVlatpF rcU= X-IronPort-AV: E=Sophos;i="5.77,459,1596470400"; d="scan'208";a="156564433" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 07 Nov 2020 16:15:35 +0800 IronPort-SDR: 11r3r9yrywNL3nI9bn0a52Nh9J9OnQLMXfQB9in4CkS1J0WoKSNHxveavwaASa4PYpUC/LSXsM HjK/vCvwLBN+JcVCvQSY2IDloIaGjXQOqsK8RrSGmdKUEnDate059U8vVqpbqqLZbGJncCEn55 ryvhPq2uTmBkd9L+cCu5vY5+g5TfQEvnEWUxLuBDXFtjVwiSQYHm0ply9WOWADl6C63qH/LxLs 4YL+Oj+5Dd6bXhJPe2Og90u65xAsUg2n45vMZvRq6fgs5u38ckTremPsKBJV30iz2motp6DK7L FpJ7Nopj/apksimyn9nKS+0j Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2020 00:00:26 -0800 IronPort-SDR: wm66Qy/0HChucDX9w7hQOkrgUfMD8sdsv9JyXig2wbzGofnzoKmJIXIyPg8/eli6D5dkanBxYf bD7VpSATO851A/BzXhEw2iTnQjpuOOxrm9ci6Ipqoi8Rs7lc83cAzHhesV0MZqpNJ80dXvM/O+ MAOvOPbQR6VrfDEq2qGT89g3zKgHQpmbd4nazHPE6n793KPZGHKblkLcmuYKmZ81EQlXFEBUL4 gXgxBvRN49eBK4yiMnyMrJqHKoX+lPlbViXHhvGc6S4ppbxVaIqnRXo79Wpebe8F3vgq3FUR4Y HcM= WDCIronportException: Internal Received: from hdrdzf2.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.85]) by uls-op-cesaip01.wdc.com with ESMTP; 07 Nov 2020 00:15:33 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org, Rob Herring , Frank Rowand , devicetree@vger.kernel.org, Serge Semin , Mark Brown , linux-spi@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel Cc: Sean Anderson Subject: [PATCH 27/32] riscv: Add SiPeed MAIX BiT board device tree Date: Sat, 7 Nov 2020 17:14:15 +0900 Message-Id: <20201107081420.60325-28-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201107081420.60325-1-damien.lemoal@wdc.com> References: <20201107081420.60325-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add a device tree for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Signed-off-by: Damien Le Moal --- .../riscv/boot/dts/kendryte/k210_maix_bit.dts | 226 ++++++++++++++++++ 1 file changed, 226 insertions(+) create mode 100644 arch/riscv/boot/dts/kendryte/k210_maix_bit.dts diff --git a/arch/riscv/boot/dts/kendryte/k210_maix_bit.dts b/arch/riscv/boot/dts/kendryte/k210_maix_bit.dts new file mode 100644 index 000000000000..fc814f7c1173 --- /dev/null +++ b/arch/riscv/boot/dts/kendryte/k210_maix_bit.dts @@ -0,0 +1,226 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bitm", "sipeed,maix-bit", + "kendryte,k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + green { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + blue { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&fpioa_jtag>; + pinctrl-names = "default"; + status = "okay"; + + fpioa_jtag: jtag { + pinmux = , + , + , + ; + }; + + fpioa_uarths: uarths { + pinmux = , + ; + }; + + fpioa_gpio: gpio { + pinmux = , + , + , + , + , + , + , + ; + }; + + fpioa_gpiohs: gpiohs { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + fpioa_i2s0: i2s0 { + pinmux = , + , + ; + }; + + fpioa_dvp: dvp { + pinmux = , + , + , + , + , + , + , + ; + }; + + fpioa_spi0: spi0 { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + fpioa_spi1: spi1 { + pinmux = , + , + , + ; /* cs */ + }; + + fpioa_i2c1: i2c1 { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&fpioa_uarths>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&fpioa_gpiohs>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&fpioa_gpio>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&fpioa_i2s0>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&fpioa_i2c1>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&fpioa_dvp>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&fpioa_spi0>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 0>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&fpioa_spi1>; + pinctrl-names = "default"; + num-cs = <1>; + polling; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <4000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};