From patchwork Thu Jan 27 09:17:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 537520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54A24C4332F for ; Thu, 27 Jan 2022 09:18:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235028AbiA0JST (ORCPT ); Thu, 27 Jan 2022 04:18:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232851AbiA0JST (ORCPT ); Thu, 27 Jan 2022 04:18:19 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8BEFC061714 for ; Thu, 27 Jan 2022 01:18:18 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E059A10000A; Thu, 27 Jan 2022 09:18:15 +0000 (UTC) From: Miquel Raynal To: Mark Brown , Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Boris Brezillon , Thomas Petazzoni , Julien Su , Jaime Liao , Miquel Raynal Subject: [PATCH v10 03/13] spi: cadence-quadspi: Provide a capability structure Date: Thu, 27 Jan 2022 10:17:58 +0100 Message-Id: <20220127091808.1043392-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com> References: <20220127091808.1043392-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This controller has DTR support, so advertize it with a capability now that the spi-controller structure contains this new field. This will later be used by the core to discriminate whether an operation is supported or not, in a more generic way than having different helpers. Signed-off-by: Miquel Raynal Reviewed-by: Pratyush Yadav Reviewed-by: Boris Brezillon Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-4-miquel.raynal@bootlin.com --- drivers/spi/spi-cadence-quadspi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index b808c94641fa..455b90d1feed 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1595,6 +1595,10 @@ static const struct spi_controller_mem_ops cqspi_mem_ops = { .supports_op = cqspi_supports_mem_op, }; +static const struct spi_controller_mem_caps cqspi_mem_caps = { + .dtr = true, +}; + static int cqspi_setup_flash(struct cqspi_st *cqspi) { struct platform_device *pdev = cqspi->pdev; @@ -1652,6 +1656,7 @@ static int cqspi_probe(struct platform_device *pdev) } master->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL; master->mem_ops = &cqspi_mem_ops; + master->mem_caps = &cqspi_mem_caps; master->dev.of_node = pdev->dev.of_node; cqspi = spi_master_get_devdata(master);