From patchwork Sat May 6 07:30:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maksim Kiselev X-Patchwork-Id: 679892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C608C7EE22 for ; Sat, 6 May 2023 07:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231443AbjEFHc5 (ORCPT ); Sat, 6 May 2023 03:32:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231461AbjEFHce (ORCPT ); Sat, 6 May 2023 03:32:34 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33B599008; Sat, 6 May 2023 00:32:16 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-3f41dceb9c9so434965e9.3; Sat, 06 May 2023 00:32:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683358333; x=1685950333; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gtohzT2EHad7nVnKEeCVnIgAjWzLPr61fqJap2+XB2o=; b=GPxZzdu5+SxHeplnw8OAVpVAdzhB8u2XEM1r+e5AzCFINJId8ePhkjY04Rg6OM7ODu 9StIMOYjGfUkuVZNjoM3kcYUZUgpvht9FH9LWucNgec8shszhV3BqT4tzSjXju8Crxfw 31KK3r+vn7qfz6p6919qbYoQTN0PyxqYCG5tOcXcChWf8C3iHnaN5UbXrryCgWaniKXr 0fnDhoulLevntSROKhUdnNtfMUvkkurVc1KAGUPEzEeNlLZhLQIULGOpC3XkE1kSxTQl lITQRJ/C3XtgKnv2fs20eQRH444MsG8/JrApVAJkzXwZZiP/NgpYtLAdpHkZYI9Xtacl aDsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683358333; x=1685950333; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gtohzT2EHad7nVnKEeCVnIgAjWzLPr61fqJap2+XB2o=; b=RHyeUMBGzCgiYnDYJd36RmxrOVbiSJ61rrkHN9R7KqfX6fGzrWacmI0zZ4dlZslXnc 16vgaEhXHpOQbxboNNw44hN572N2x9WP9GmHrI8AOHvCOUrnDC7sWPSqh8h9c3OCFuE1 WJRF0gggpJg8d6OU2598ib5yE1sQMlzGE9/8yPE66M+MI4o1dmfOUNiONu6gmK/UOFlN EoEhNDCynW4WZpjuIXtLUYNTewItQarKEpCVZlhb2owwGQSDdFUBUEohbbqNLpl7yq8K h2DiLLhc16K4bWnCR6g+sVAQykhHnHWvmrj6U01AgRIlizQtXWgnUEcvyTXIXbRJmdaj 1wQg== X-Gm-Message-State: AC+VfDwTNbOq+zmb11Qk28ky2MjjtjoVh0qNPoDSwsXhN8fBtM3OEYu9 5X69rN/PsmdIhGSovFlPCRw= X-Google-Smtp-Source: ACHHUZ6Kx3Pt9t+hazzzf0oJQEZnB97KKRY1yEStsNqIdTdpP243ByTp69bvLvIbZUSLe8Mc80IwVA== X-Received: by 2002:a1c:ed03:0:b0:3f1:e5f2:5e86 with SMTP id l3-20020a1ced03000000b003f1e5f25e86mr2668823wmh.23.1683358333153; Sat, 06 May 2023 00:32:13 -0700 (PDT) Received: from localhost.localdomain ([176.221.215.212]) by smtp.gmail.com with ESMTPSA id q14-20020a7bce8e000000b003f182a10106sm10071944wmj.8.2023.05.06.00.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 May 2023 00:32:12 -0700 (PDT) From: Maksim Kiselev To: Andre Przywara Cc: Icenowy Zheng , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , Cristian Ciocaltea , Maksim Kiselev , Maxime Ripard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 2/6] spi: sun6i: change OF match data to a struct Date: Sat, 6 May 2023 10:30:10 +0300 Message-Id: <20230506073018.1411583-3-bigunclemax@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230506073018.1411583-1-bigunclemax@gmail.com> References: <20230506073018.1411583-1-bigunclemax@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Icenowy Zheng As we're adding more properties to the OF match data, convert it to a struct now. Signed-off-by: Icenowy Zheng --- drivers/spi/spi-sun6i.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 7532c85a352c..01a01cd86db5 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -85,6 +85,10 @@ #define SUN6I_TXDATA_REG 0x200 #define SUN6I_RXDATA_REG 0x300 +struct sun6i_spi_cfg { + unsigned long fifo_depth; +}; + struct sun6i_spi { struct spi_master *master; void __iomem *base_addr; @@ -99,7 +103,7 @@ struct sun6i_spi { const u8 *tx_buf; u8 *rx_buf; int len; - unsigned long fifo_depth; + const struct sun6i_spi_cfg *cfg; }; static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg) @@ -156,7 +160,7 @@ static inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi) u8 byte; /* See how much data we can fit */ - cnt = sspi->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi); + cnt = sspi->cfg->fifo_depth - sun6i_spi_get_tx_fifo_count(sspi); len = min((int)cnt, sspi->len); @@ -289,14 +293,14 @@ static int sun6i_spi_transfer_one(struct spi_master *master, * the hardcoded value used in old generation of Allwinner * SPI controller. (See spi-sun4i.c) */ - trig_level = sspi->fifo_depth / 4 * 3; + trig_level = sspi->cfg->fifo_depth / 4 * 3; } else { /* * Setup FIFO DMA request trigger level * We choose 1/2 of the full fifo depth, that value will * be used as DMA burst length. */ - trig_level = sspi->fifo_depth / 2; + trig_level = sspi->cfg->fifo_depth / 2; if (tfr->tx_buf) reg |= SUN6I_FIFO_CTL_TF_DRQ_EN; @@ -410,9 +414,9 @@ static int sun6i_spi_transfer_one(struct spi_master *master, reg = SUN6I_INT_CTL_TC; if (!use_dma) { - if (rx_len > sspi->fifo_depth) + if (rx_len > sspi->cfg->fifo_depth) reg |= SUN6I_INT_CTL_RF_RDY; - if (tx_len > sspi->fifo_depth) + if (tx_len > sspi->cfg->fifo_depth) reg |= SUN6I_INT_CTL_TF_ERQ; } @@ -543,7 +547,7 @@ static bool sun6i_spi_can_dma(struct spi_master *master, * the fifo length we can just fill the fifo and wait for a single * irq, so don't bother setting up dma */ - return xfer->len > sspi->fifo_depth; + return xfer->len > sspi->cfg->fifo_depth; } static int sun6i_spi_probe(struct platform_device *pdev) @@ -582,7 +586,7 @@ static int sun6i_spi_probe(struct platform_device *pdev) } sspi->master = master; - sspi->fifo_depth = (unsigned long)of_device_get_match_data(&pdev->dev); + sspi->cfg = of_device_get_match_data(&pdev->dev); master->max_speed_hz = 100 * 1000 * 1000; master->min_speed_hz = 3 * 1000; @@ -695,9 +699,17 @@ static void sun6i_spi_remove(struct platform_device *pdev) dma_release_channel(master->dma_rx); } +static const struct sun6i_spi_cfg sun6i_a31_spi_cfg = { + .fifo_depth = SUN6I_FIFO_DEPTH, +}; + +static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = { + .fifo_depth = SUN8I_FIFO_DEPTH, +}; + static const struct of_device_id sun6i_spi_match[] = { - { .compatible = "allwinner,sun6i-a31-spi", .data = (void *)SUN6I_FIFO_DEPTH }, - { .compatible = "allwinner,sun8i-h3-spi", .data = (void *)SUN8I_FIFO_DEPTH }, + { .compatible = "allwinner,sun6i-a31-spi", .data = &sun6i_a31_spi_cfg }, + { .compatible = "allwinner,sun8i-h3-spi", .data = &sun8i_h3_spi_cfg }, {} }; MODULE_DEVICE_TABLE(of, sun6i_spi_match);