From patchwork Tue Feb 27 08:46:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 776406 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D30C812EBC8 for ; Tue, 27 Feb 2024 08:47:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709023625; cv=none; b=OQERJCunPBB/KFdP2Z0nwtsAJMqsc+Z6RGaZoaStcwhuGil8qOIZMcQCWGSEcMvTei/fJZm8+FXRaIr7D4XBva/0hScoXD6QZjQcl9Zgre5gcMN6szGmKbRVG4tdVukYcHIAxSiHnoD2GkVIhpROS/JbP29VomiFhRRoBS2XJYc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709023625; c=relaxed/simple; bh=UhDeIhrmGwaQW6n0yRLGxohLCjw2fk86n5YVIzLim08=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=swLPZfMBn3JfE6/OR5n98PDqEHMQ9IXNdKVGQln2JUCJj3rjLMtnHVoVIXZhoL4CpeMOgUVxWs91nbcDqF0ssoTDu2TPq17VOfqAnAuVT60mFZd6hEN5vGzSkkvauI5+jLNreouG7OcX+04qEY5aANMt6L6TGSoEo3wy+NNENa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ret6v-0003DI-OB; Tue, 27 Feb 2024 09:46:49 +0100 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ret6u-0039kQ-3P; Tue, 27 Feb 2024 09:46:48 +0100 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.96) (envelope-from ) id 1ret6u-00CL29-02; Tue, 27 Feb 2024 09:46:48 +0100 Date: Tue, 27 Feb 2024 09:46:47 +0100 From: Uwe =?utf-8?q?Kleine-K=C3=B6nig?= To: Michael Ellerman Cc: Nicholas Piggin , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , linuxppc-dev@lists.ozlabs.org, linux-spi@vger.kernel.org, Mark Brown Subject: Increasing build coverage for drivers/spi/spi-ppc4xx.c Message-ID: Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-spi@vger.kernel.org Hello, recently the spi-ppc4xx.c driver suffered from build errors and warnings that were undetected for longer than I expected. I think it would be very beneficial if this driver was enabled in (at least) a powerpc allmodconfig build. The challenge to do so is that spi-ppc4xx.c uses dcri_clrset() which is only defined for 4xx (as these select PPC_DCR_NATIVE). I wonder if dcri_clrset() could be defined for the PPC_DCR_MMIO case, too. I tried and failed. The best I came up without extensive doc reading is: While this is a step in the right direction (I think) it's not enough to make the driver build (but maybe make it easier to define dcri_clrset()?) Could someone with more powerpc knowledge jump in and help (for the benefit of better compile coverage of the spi driver and so less breakage)? (If you do so based on my changes above, you don't need to credit me for my effort, claim it as your's. I'm happy enough if the situation improves.) Thanks Uwe diff --git a/arch/powerpc/include/asm/dcr-native.h b/arch/powerpc/include/asm/dcr-native.h index a92059964579..159ab7abfe46 100644 --- a/arch/powerpc/include/asm/dcr-native.h +++ b/arch/powerpc/include/asm/dcr-native.h @@ -115,15 +115,11 @@ static inline void __dcri_clrset(int base_addr, int base_data, int reg, unsigned int val; spin_lock_irqsave(&dcr_ind_lock, flags); - if (cpu_has_feature(CPU_FTR_INDEXED_DCR)) { - mtdcrx(base_addr, reg); - val = (mfdcrx(base_data) & ~clr) | set; - mtdcrx(base_data, val); - } else { - __mtdcr(base_addr, reg); - val = (__mfdcr(base_data) & ~clr) | set; - __mtdcr(base_data, val); - } + + mtdcr(base_addr, reg); + val = (mfdcr(base_data) & ~clr) | set; + mtdcr(base_data, val); + spin_unlock_irqrestore(&dcr_ind_lock, flags); } diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index bc7021da2fe9..9a0a5e8c70c8 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -810,7 +810,8 @@ config SPI_PL022 config SPI_PPC4xx tristate "PPC4xx SPI Controller" - depends on PPC32 && 4xx + depends on 4xx || COMPILE_TEST + depends on PPC32 || PPC64 select SPI_BITBANG help This selects a driver for the PPC4xx SPI Controller.