From patchwork Tue Apr 12 18:30:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 561435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E523C433EF for ; Tue, 12 Apr 2022 18:30:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358734AbiDLSdH (ORCPT ); Tue, 12 Apr 2022 14:33:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358727AbiDLSce (ORCPT ); Tue, 12 Apr 2022 14:32:34 -0400 Received: from out28-169.mail.aliyun.com (out28-169.mail.aliyun.com [115.124.28.169]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B7DE4EA12; Tue, 12 Apr 2022 11:30:14 -0700 (PDT) X-Alimail-AntiSpam: AC=CONTINUE; BC=0.08322316|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0126115-0.000601172-0.986787; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047209; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=16; RT=16; SR=0; TI=SMTPD_---.NPNg.pv_1649788210; Received: from zhouyanjie-virtual-machine.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.NPNg.pv_1649788210) by smtp.aliyun-inc.com(33.37.68.114); Wed, 13 Apr 2022 02:30:11 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: gregkh@linuxfoundation.org, hminas@synopsys.com, robh+dt@kernel.org, krzk+dt@kernel.org Cc: linux-usb@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dragancecavac@yahoo.com, hns@goldelico.com, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sernia.zhou@foxmail.com, zhenwenjin@gmail.com, reimu@sudomaker.com Subject: [PATCH v2 2/2] USB: dwc2: Add OTG support for Ingenic SoCs. Date: Wed, 13 Apr 2022 02:30:01 +0800 Message-Id: <1649788201-87620-3-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1649788201-87620-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1649788201-87620-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add OTG support for the JZ4775 SoC, the JZ4780 SoC, the X1000 SoC, the X1600 SoC, the X1700 SoC, the X1830 SoC, and the X2000 SoC from Ingenic. Introduce support for disable Ingenic overcurrent detection, once selected, it enables the GOTGCTL register bits VbvalidOvEn and VbvalidOvVal to disable the VBUS overcurrent detection. This patch is derived from Dragan Čečavac (in the kernel 3.18.3 tree of CI20). It is very useful for the MIPS Creator CI20 (r1). Without this patch, OTG port of CI20 has a great probability to face overcurrent warning, which breaks the OTG functionality. Signed-off-by: Dragan Čečavac Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Minas Harutyunyan --- Notes: v1->v2: 1.Add Minas Harutyunyan's Acked-by. 2.Use "activate_ingenic_overcurrent_detection" instead "deactivate_ingenic_overcurrent_detection" as Greg's suggestion. drivers/usb/dwc2/core.c | 9 +++++++++ drivers/usb/dwc2/core.h | 5 +++++ drivers/usb/dwc2/params.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++- 3 files changed, 63 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index cf0bcd0..dc4fc72 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -1153,6 +1153,7 @@ static void dwc2_set_turnaround_time(struct dwc2_hsotg *hsotg) int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) { u32 usbcfg; + u32 otgctl; int retval = 0; if ((hsotg->params.speed == DWC2_SPEED_PARAM_FULL || @@ -1187,6 +1188,14 @@ int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy) dwc2_writel(hsotg, usbcfg, GUSBCFG); } + if (!hsotg->params.activate_ingenic_overcurrent_detection) { + if (dwc2_is_host_mode(hsotg)) { + otgctl = readl(hsotg->regs + GOTGCTL); + otgctl |= GOTGCTL_VBVALOEN | GOTGCTL_VBVALOVAL; + writel(otgctl, hsotg->regs + GOTGCTL); + } + } + return retval; } diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 88c337b..0683852 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -426,6 +426,10 @@ enum dwc2_ep0_state { * detection using GGPIO register. * 0 - Deactivate the external level detection (default) * 1 - Activate the external level detection + * @activate_ingenic_overcurrent_detection: Activate Ingenic overcurrent + * detection. + * 0 - Deactivate the overcurrent detection + * 1 - Activate the overcurrent detection (default) * @g_dma: Enables gadget dma usage (default: autodetect). * @g_dma_desc: Enables gadget descriptor DMA (default: autodetect). * @g_rx_fifo_size: The periodic rx fifo size for the device, in @@ -494,6 +498,7 @@ struct dwc2_core_params { u8 hird_threshold; bool activate_stm_fs_transceiver; bool activate_stm_id_vb_detection; + bool activate_ingenic_overcurrent_detection; bool ipg_isoc_en; u16 max_packet_count; u32 max_transfer_size; diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index 1306f4e..fdb8a42f 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -73,6 +73,47 @@ static void dwc2_set_his_params(struct dwc2_hsotg *hsotg) p->power_down = DWC2_POWER_DOWN_PARAM_NONE; } +static void dwc2_set_jz4775_params(struct dwc2_hsotg *hsotg) +{ + struct dwc2_core_params *p = &hsotg->params; + + p->otg_caps.hnp_support = false; + p->speed = DWC2_SPEED_PARAM_HIGH; + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; + p->phy_utmi_width = 16; + p->activate_ingenic_overcurrent_detection = + !device_property_read_bool(hsotg->dev, "disable-over-current"); +} + +static void dwc2_set_x1600_params(struct dwc2_hsotg *hsotg) +{ + struct dwc2_core_params *p = &hsotg->params; + + p->otg_caps.hnp_support = false; + p->speed = DWC2_SPEED_PARAM_HIGH; + p->host_channels = 16; + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; + p->phy_utmi_width = 16; + p->activate_ingenic_overcurrent_detection = + !device_property_read_bool(hsotg->dev, "disable-over-current"); +} + +static void dwc2_set_x2000_params(struct dwc2_hsotg *hsotg) +{ + struct dwc2_core_params *p = &hsotg->params; + + p->otg_caps.hnp_support = false; + p->speed = DWC2_SPEED_PARAM_HIGH; + p->host_rx_fifo_size = 1024; + p->host_nperio_tx_fifo_size = 1024; + p->host_perio_tx_fifo_size = 1024; + p->host_channels = 16; + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; + p->phy_utmi_width = 16; + p->activate_ingenic_overcurrent_detection = + !device_property_read_bool(hsotg->dev, "disable-over-current"); +} + static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg) { struct dwc2_core_params *p = &hsotg->params; @@ -221,7 +262,14 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg) const struct of_device_id dwc2_of_match_table[] = { { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params }, - { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, + { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, + { .compatible = "ingenic,jz4775-otg", .data = dwc2_set_jz4775_params }, + { .compatible = "ingenic,jz4780-otg", .data = dwc2_set_jz4775_params }, + { .compatible = "ingenic,x1000-otg", .data = dwc2_set_jz4775_params }, + { .compatible = "ingenic,x1600-otg", .data = dwc2_set_x1600_params }, + { .compatible = "ingenic,x1700-otg", .data = dwc2_set_x1600_params }, + { .compatible = "ingenic,x1830-otg", .data = dwc2_set_x1600_params }, + { .compatible = "ingenic,x2000-otg", .data = dwc2_set_x2000_params }, { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params }, { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params }, { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },