From patchwork Tue Jun 14 19:34:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 582218 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27C91CCA47A for ; Tue, 14 Jun 2022 19:46:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344359AbiFNTqZ (ORCPT ); Tue, 14 Jun 2022 15:46:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238934AbiFNTqW (ORCPT ); Tue, 14 Jun 2022 15:46:22 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 152EB2FE44 for ; Tue, 14 Jun 2022 12:46:22 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id v11-20020a17090a4ecb00b001e2c5b837ccso12777960pjl.3 for ; Tue, 14 Jun 2022 12:46:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EP6kjhqDA4kzHmGHs/9bVpqUdTblq6ZRXkltoDHVJIg=; b=GcWlCP/GNpmS+ZTqes3eEyiy6M8IJ5cz50y4m4PFUwIS7osKafuAUy6szkDG0MV1gj 02nAmkiWVyBLGTRlV7Kd3H1Bac98DRb9Vbhdxt2YAFxERw3b5MvBGGaaVM4FoOEPaQxq m3wuaovtbrHbpl6A/KjmRQJBmeiVMGxm4dLMc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EP6kjhqDA4kzHmGHs/9bVpqUdTblq6ZRXkltoDHVJIg=; b=CIQn+9Rkw9Qu3bGjlTeo/B/e0BKa9nysKGH/82PRZ2RzclZBGCGiXZpFojDCZlaXsC 86zOpJcRoRLdw+0jsuybnL3nZaFtaNodKG9WDrHOin9D0Q0EvDaR+CEcTUGzPddqYlj0 GLab5GLK7CWG0VwzOLpGNb1l9Zu/xW+WWfNBq56JWzWnHSG0LuSHX7ucs/R0AkjZ69y+ NbMjwuif73SXjq00V9BtfRqeRxeJG4qw+BG9h+n27SsAPpIDiKZNoyE5qcviVp5Mh1xo e1SfZSzatkUoCYUfrjfF1mAZCEpAFZH0kK8444nnuodt9zHfVriOE6gy67knlBwlHcQI 3A+Q== X-Gm-Message-State: AJIora/nSDtYSU7SWK+ZUvatwIMidEqje9ivauwrEEcHa0xE0WKn3UsI 5qXOjFkolk7yjj6wo3DkpRRy8g== X-Google-Smtp-Source: AGRyM1ts/A9elnR0lCZjcV3e64abgFvNk6iD/IFUcyUTyE+3MbAB7sPQQTBg1CpFg8Yv13OD0qq8Fw== X-Received: by 2002:a17:90b:4b83:b0:1e3:3ad3:612c with SMTP id lr3-20020a17090b4b8300b001e33ad3612cmr6040010pjb.87.1655235981552; Tue, 14 Jun 2022 12:46:21 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id l21-20020a17090a409500b001df3a251cc2sm10014426pjg.4.2022.06.14.12.46.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jun 2022 12:46:20 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: bleung@chromium.org, swboyd@chromium.org, heikki.krogerus@linux.intel.com, Pin-Yen Lin , =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_?= =?utf-8?q?=2E_Prado?= , Prashant Malani , Andrzej Hajda , Daniel Vetter , David Airlie , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS), Greg Kroah-Hartman , Hsin-Yi Wang , Jernej Skrabec , Jonas Karlman , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Krzysztof Kozlowski , Laurent Pinchart , Maxime Ripard , Neil Armstrong , Robert Foss , Rob Herring , Sam Ravnborg , Thomas Zimmermann , Xin Ji Subject: [PATCH v3 7/7] drm/bridge: anx7625: Add typec_mux_set callback function Date: Tue, 14 Jun 2022 19:34:41 +0000 Message-Id: <20220614193558.1163205-8-pmalani@chromium.org> X-Mailer: git-send-email 2.36.1.476.g0c4daa206d-goog In-Reply-To: <20220614193558.1163205-1-pmalani@chromium.org> References: <20220614193558.1163205-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Pin-Yen Lin Add the callback function when the driver receives state changes of the Type-C port. The callback function configures the crosspoint switch of the anx7625 bridge chip, which can change the output pins of the signals according to the port state. Reviewed-by: NĂ­colas F. R. A. Prado Tested-by: NĂ­colas F. R. A. Prado Signed-off-by: Pin-Yen Lin Signed-off-by: Prashant Malani --- Changes since v2: - Moved num_typec_switches check to beginning of function - Made dp_connected assignments fit on one line (and removed unnecessary parentheses) - Added Reviewed-by and Tested-by tags. Changes since v1: - No changes. drivers/gpu/drm/bridge/analogix/anx7625.c | 56 +++++++++++++++++++++++ drivers/gpu/drm/bridge/analogix/anx7625.h | 13 ++++++ 2 files changed, 69 insertions(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index bd21f159b973..5992fc8beeeb 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -2582,9 +2583,64 @@ static void anx7625_runtime_disable(void *data) pm_runtime_disable(data); } +static void anx7625_set_crosspoint_switch(struct anx7625_data *ctx, + enum typec_orientation orientation) +{ + if (orientation == TYPEC_ORIENTATION_NORMAL) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX1 | SW_SEL1_DPTX0_RX2); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX1 | SW_SEL2_DPTX1_TX2); + } else if (orientation == TYPEC_ORIENTATION_REVERSE) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX2 | SW_SEL1_DPTX0_RX1); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX2 | SW_SEL2_DPTX1_TX1); + } +} + +static void anx7625_typec_two_ports_update(struct anx7625_data *ctx) +{ + if (ctx->typec_ports[0].dp_connected && ctx->typec_ports[1].dp_connected) + /* Both ports available, do nothing to retain the current one. */ + return; + else if (ctx->typec_ports[0].dp_connected) + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_NORMAL); + else if (ctx->typec_ports[1].dp_connected) + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_REVERSE); +} + static int anx7625_typec_mux_set(struct typec_mux_dev *mux, struct typec_mux_state *state) { + struct anx7625_port_data *data = typec_mux_get_drvdata(mux); + struct anx7625_data *ctx = data->ctx; + struct device *dev = &ctx->client->dev; + bool new_dp_connected, old_dp_connected; + + if (ctx->num_typec_switches == 1) + return 0; + + old_dp_connected = ctx->typec_ports[0].dp_connected || ctx->typec_ports[1].dp_connected; + + dev_dbg(dev, "mux_set dp_connected: c0=%d, c1=%d\n", + ctx->typec_ports[0].dp_connected, ctx->typec_ports[1].dp_connected); + + data->dp_connected = (state->alt && state->alt->svid == USB_TYPEC_DP_SID && + state->alt->mode == USB_TYPEC_DP_MODE); + + new_dp_connected = ctx->typec_ports[0].dp_connected || ctx->typec_ports[1].dp_connected; + + /* dp on, power on first */ + if (!old_dp_connected && new_dp_connected) + pm_runtime_get_sync(dev); + + anx7625_typec_two_ports_update(ctx); + + /* dp off, power off last */ + if (old_dp_connected && !new_dp_connected) + pm_runtime_put_sync(dev); + return 0; } diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 76cfc64f7574..7d6c6fdf9a3a 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -55,6 +55,18 @@ #define HPD_STATUS_CHANGE 0x80 #define HPD_STATUS 0x80 +#define TCPC_SWITCH_0 0xB4 +#define SW_SEL1_DPTX0_RX2 BIT(0) +#define SW_SEL1_DPTX0_RX1 BIT(1) +#define SW_SEL1_SSRX_RX2 BIT(4) +#define SW_SEL1_SSRX_RX1 BIT(5) + +#define TCPC_SWITCH_1 0xB5 +#define SW_SEL2_DPTX1_TX2 BIT(0) +#define SW_SEL2_DPTX1_TX1 BIT(1) +#define SW_SEL2_SSTX_TX2 BIT(4) +#define SW_SEL2_SSTX_TX1 BIT(5) + /******** END of I2C Address 0x58 ********/ /***************************************************************/ @@ -444,6 +456,7 @@ struct anx7625_i2c_client { }; struct anx7625_port_data { + bool dp_connected; struct typec_mux_dev *typec_mux; struct anx7625_data *ctx; };