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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2023 Realtek Semiconductor Corporation
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek DHC SoCs USB 3.0 PHY
+
+maintainers:
+  - Stanley Chang <stanley_chang@realtek.com>
+
+description:
+  Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs.
+  The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs
+  support multiple XHCI controllers. One PHY device node maps to one XHCI
+  controller.
+
+  RTD1295/RTD1619 SoCs USB
+  The USB architecture includes three XHCI controllers.
+  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
+  controllers.
+  XHCI controller#0 -- usb2phy -- phy#0
+                    |- usb3phy -- phy#0
+  XHCI controller#1 -- usb2phy -- phy#0
+  XHCI controller#2 -- usb2phy -- phy#0
+                    |- usb3phy -- phy#0
+
+  RTD1395 SoCs USB
+  The USB architecture includes two XHCI controllers.
+  The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0
+  PHY.
+  XHCI controller#0 -- usb2phy -- phy#0
+  XHCI controller#1 -- usb2phy -- phy#0
+                               |- phy#1
+
+  RTD1319/RTD1619b SoCs USB
+  The USB architecture includes three XHCI controllers.
+  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
+  XHCI controller#0 -- usb2phy -- phy#0
+  XHCI controller#1 -- usb2phy -- phy#0
+  XHCI controller#2 -- usb2phy -- phy#0
+                    |- usb3phy -- phy#0
+
+  RTD1319d SoCs USB
+  The USB architecture includes three XHCI controllers.
+  Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
+  XHCI controller#0 -- usb2phy -- phy#0
+                    |- usb3phy -- phy#0
+  XHCI controller#1 -- usb2phy -- phy#0
+  XHCI controller#2 -- usb2phy -- phy#0
+
+  RTD1312c/RTD1315e SoCs USB
+  The USB architecture includes three XHCI controllers.
+  Each XHCI maps to one USB 2.0 PHY.
+  XHCI controller#0 -- usb2phy -- phy#0
+  XHCI controller#1 -- usb2phy -- phy#0
+  XHCI controller#2 -- usb2phy -- phy#0
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - realtek,rtd1295-usb3phy
+          - realtek,rtd1619-usb3phy
+          - realtek,rtd1319-usb3phy
+          - realtek,rtd1619b-usb3phy
+          - realtek,rtd1319d-usb3phy
+      - const: realtek,usb3phy
+
+  reg:
+    description: PHY data registers
+    maxItems: 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  "#phy-cells":
+    const: 0
+
+patternProperties:
+  "^phy@[0-3]+$":
+    description: Each sub-node is a PHY device for one XHCI controller.
+    type: object
+    properties:
+      realtek,param:
+        description: The data of PHY parameter are the pair of the
+          offset and value.
+        $ref: /schemas/types.yaml#/definitions/uint8-array
+
+      realtek,do-toggle:
+        description: Set this flag to enable the PHY parameter toggle
+          when port status change.
+        type: boolean
+
+      realtek,do-toggle-once:
+        description: Set this flag to do PHY parameter toggle only on
+          PHY init.
+        type: boolean
+
+      realtek,check-efuse:
+        description: Enable to update PHY parameter from reading otp table.
+        type: boolean
+
+      realtek,use-default-parameter:
+        description: Don't set parameter and use default value in hardware.
+        type: boolean
+
+      realtek,check-rx-front-end-offset:
+        description: Enable to check rx front end offset.
+        type: boolean
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    usb_port2_usb3phy: usb-phy@13e10 {
+        compatible = "realtek,rtd1319d-usb3phy", "realtek,usb3phy";
+        reg = <0x13e10 0x4>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        #phy-cells = <0>;
+
+        phy@0 {
+            reg = <0>;
+            realtek,param =
+                    <0x01 0xac8c>,
+                    <0x06 0x0017>,
+                    <0x09 0x724c>,
+                    <0x0B 0xb90d>,
+                    <0x0A 0xb610>,
+                    <0x0D 0xef2a>,
+                    <0x0F 0x9050>,
+                    <0x10 0x000c>,
+                    <0x20 0x70ff>,
+                    <0x21 0xcfaa>,
+                    <0x22 0x0013>,
+                    <0x23 0xdb66>,
+                    <0x26 0x8609>,
+                    <0x29 0xff13>,
+                    <0x2A 0x3070>;
+            realtek,do-toggle-once;
+            realtek,check-efuse;
+        };
+    };
+
