From patchwork Sat Feb 3 02:36:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 769821 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D910D48CC8; Sat, 3 Feb 2024 02:38:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706927886; cv=none; b=ss4/aZ7Fj+vG46vgjzaLza0FmNrA7W5zJsiWPustFxXc9ewCAbNH1nuW26RRbAjJmxsxJjNQGzslDSS4rvY1m9yAincJxcbtwTCFLY6ZQv6qNS645JenrL6FSg70nneyawSgd+wzyIu7TqSN7+9d2yzlKYeyybPYItDRdebhRAg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706927886; c=relaxed/simple; bh=SI/xXqTaKb918srbROgcUJ5EMq0uUfJ689ErJLs6vMk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZVC66CPoC6NWM7c8+sCTOLJbpFMwvyG1wgk9wszhF/qcDeHZ923AmADxEHLMHAys4w7m4wsw7pgI/4JVbuzuU88x/jbFNAwgv7OxUpl5KA+Et724RayB55OT88kCT/Zi3zfFJOyfMUFDSLKEcp4SJXLSRuO2mZyvTAe0xCta/k0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Q9mwtihL; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Q9mwtihL" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4132Yc0K014625; Sat, 3 Feb 2024 02:37:48 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=R0hg4dDBYEp27ZuNyVb3 W+iuKNUNsrbwtnpJmQVwa24=; b=Q9mwtihLN8V3cZBMvOG3mSYH+bCwIRamKpYX y9ridLpR4KwKIv3mPn3gikcX8VVY7RyI1RiVzjb900ujF03BCY0qaD3uJF+y5U1h yhJi1CQgYPpdz5JDjA74wcl1tRV4i3caEr5sZIPf5iAtBVFRS0dscmAC3ClC2wUS DnBonCovZIW+JQ4NpxYSTTnh8XZpkxIWxZjGHzzt1CJP5zDRpfhjphEXjd/Zd1Nb hXMFmpRxrWOOpHWE21smdHcfcffzehEHBXF+aPlq6YPKZJcWaaOpXy9KX9y7ungW 9FeHTvDsH5wD2rFBuGWEdJjEbbpiYiULd956jhdL8SgMUT5tqA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w1ctq003b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 03 Feb 2024 02:37:47 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 4132bMgn004240 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 3 Feb 2024 02:37:22 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 2 Feb 2024 18:37:22 -0800 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v13 17/53] usb: host: xhci-sideband: Expose a sideband interrupter enable API Date: Fri, 2 Feb 2024 18:36:09 -0800 Message-ID: <20240203023645.31105-18-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240203023645.31105-1-quic_wcheng@quicinc.com> References: <20240203023645.31105-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: eZDW89bTix9xxiCcb_iZeol03daH3Mct X-Proofpoint-GUID: eZDW89bTix9xxiCcb_iZeol03daH3Mct X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-02_16,2024-01-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 spamscore=0 phishscore=0 mlxlogscore=861 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402030015 Some use cases maybe require that the secondary interrupter's events to be handled by the OS. In this case, configure the IMOD and the skip_events property to enable the interrupter's events. By default, assume that the secondary interrupter doesn't want to enable OS event handling. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-sideband.c | 28 ++++++++++++++++++++++++++++ include/linux/usb/xhci-sideband.h | 2 ++ 2 files changed, 30 insertions(+) diff --git a/drivers/usb/host/xhci-sideband.c b/drivers/usb/host/xhci-sideband.c index 0944bf31d772..504a6f1586b5 100644 --- a/drivers/usb/host/xhci-sideband.c +++ b/drivers/usb/host/xhci-sideband.c @@ -237,6 +237,30 @@ xhci_sideband_get_event_buffer(struct xhci_sideband *sb) } EXPORT_SYMBOL_GPL(xhci_sideband_get_event_buffer); +/** + * xhci_sideband_enable_interrupt - enable interrupt for secondary interrupter + * @sb: sideband instance for this usb device + * @imod_interval: number of event ring segments to allocate + * + * Enables OS owned event handling for a particular interrupter if client + * requests for it. In addition, set the IMOD interval for this particular + * interrupter. + * + * Returns 0 on success, negative error otherwise + */ +int xhci_sideband_enable_interrupt(struct xhci_sideband *sb, u32 imod_interval) +{ + if (!sb || !sb->ir) + return -ENODEV; + + xhci_set_interrupter_moderation(sb->ir, imod_interval); + sb->ir->skip_events = false; + xhci_enable_interrupter(sb->ir); + + return 0; +} +EXPORT_SYMBOL_GPL(xhci_sideband_enable_interrupt); + /** * xhci_sideband_create_interrupter - creates a new interrupter for this sideband * @sb: sideband instance for this usb device @@ -275,6 +299,8 @@ xhci_sideband_create_interrupter(struct xhci_sideband *sb, int num_seg, } sb->ir->ip_autoclear = ip_autoclear; + /* skip events for secondary interrupters by default */ + sb->ir->skip_events = true; out: mutex_unlock(&sb->mutex); @@ -297,6 +323,8 @@ xhci_sideband_remove_interrupter(struct xhci_sideband *sb) return; mutex_lock(&sb->mutex); + if (!sb->ir->skip_events) + xhci_disable_interrupter(sb->ir); xhci_remove_secondary_interrupter(xhci_to_hcd(sb->xhci), sb->ir); sb->ir = NULL; diff --git a/include/linux/usb/xhci-sideband.h b/include/linux/usb/xhci-sideband.h index 1035dae43cee..a749ae307ba7 100644 --- a/include/linux/usb/xhci-sideband.h +++ b/include/linux/usb/xhci-sideband.h @@ -54,6 +54,8 @@ xhci_sideband_get_endpoint_buffer(struct xhci_sideband *sb, struct sg_table * xhci_sideband_get_event_buffer(struct xhci_sideband *sb); +int xhci_sideband_enable_interrupt(struct xhci_sideband *sb, u32 imod_interval); + int xhci_sideband_create_interrupter(struct xhci_sideband *sb, int num_seg, bool ip_autoclear);