From patchwork Mon Apr 22 22:48:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 791459 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A9B945C16; Mon, 22 Apr 2024 22:50:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713826205; cv=none; b=Mo8j0vnlbjDEy5GDed8mYEZ7qtXMypLcsTmK3fpl2sseCYravWEFXNKb4eOYEICLnpgDdZ1xU/75AUc19GHyqMHDcjwgZQ0iHY9nYt2Cyo9iMsYcrRd6omjn2LwDPdcz3PKVHMhEtuj6AnxFJ3tNZ7L7ya0jj9TPa4k05UO/v9Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713826205; c=relaxed/simple; bh=ltXX8jP7pn8uVpu5KSPpn79cIYm5HfBGTiCUp+UHg9k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cI4cJtpV6wn4Mecn8mKFN/3UAUl4cr8j5wfmD8L3sKEZ4JjgSb10yOm9p+md8QcL8L/hhOsxKIEm0UKsdJ9MZPRFqJK6YnD8jYma44sJ5wcUi8DtQxdosfRrYmnM7bcvz/ySVQkvwtEt63v9Sqfm1dSPR0MWw/xWE0+bkhJ7/Ys= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=G5PRtjOx; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="G5PRtjOx" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 43MMno8G032613; Mon, 22 Apr 2024 22:49:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=AN6ZcvMWlqNjOXpEc6Fd iWAhkqYqJERCJ3muWeL5xeM=; b=G5PRtjOxF+c9b6iBAfPnVMvBYrtm5If12+rg Sr07Yw9mxgXgSpDGyUYNzfDoiCJoc6JV9DT94Egep3OKwd0MdQnEGAmSZ1/Bye2S bJVuyAnUF1LbfMQHYkwSZC8OR3aa3xGeJbb2VvmIkfLpoSdM3cR1xyMT+nY87FOD uTYopQtLR7tuOnKsKStqif1tFJO0x6Rnzk1kYS4IAtMRTztS2tEMCvzhEC+TJbs9 YfO79NmwJEpwXmYbtkd4hjeuzOekxdROtG4htKbRvSq9kq/bchBHwPVSpG3aK86q 5rPQNt+DskIzBhcpOSq+V57xCIO5NYz5Iad6S+paCa3IEedKgg== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xnmuvhu4d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 22 Apr 2024 22:49:49 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43MMnLvh012082 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 22 Apr 2024 22:49:21 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 22 Apr 2024 15:49:21 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v19 18/41] usb: host: xhci-plat: Set XHCI max interrupters if property is present Date: Mon, 22 Apr 2024 15:48:43 -0700 Message-ID: <20240422224906.15868-19-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240422224906.15868-1-quic_wcheng@quicinc.com> References: <20240422224906.15868-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: M5nOCt_xBOVbnz-s7ujNbbc0tIxc5Q9W X-Proofpoint-ORIG-GUID: M5nOCt_xBOVbnz-s7ujNbbc0tIxc5Q9W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-22_16,2024-04-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 mlxscore=0 suspectscore=0 phishscore=0 adultscore=0 spamscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404220096 Some platforms may want to limit the number of XHCI interrupters allocated. This is passed to xhci-plat as a device property. Ensure that this is read and the max_interrupters field is set. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-plat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 3d071b875308..1c12cadc02a1 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -258,6 +258,8 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + device_property_read_u16(tmpdev, "num-hc-interrupters", + &xhci->max_interrupters); } /*