| Message ID | 20220629164414.301813-1-viorel.suman@oss.nxp.com |
|---|---|
| Headers | show |
| Series | dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml | expand |
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Viorel Suman <viorel.suman@nxp.com> > > Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ > * Updated according to Krzysztof Kozlowski comments > My comment a about removal of each part of TXT bindings in each patch, was not addressed. Your approach makes it more difficult to read patches and makes sense only if each subsystem maintainer will take the patches (separately). If the patches are going through one tree, then better to remove the TXT gradually. So the question - who is going to take each of the patches? Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'iomux/pinctrl' child node of the SCU main node. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- > .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > new file mode 100644 > index 000000000000..76a2e7b28172 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol > + > +maintainers: > + - Dong Aisheng <aisheng.dong@nxp.com> > + > +description: i.MX SCU Client Device Node > + Client nodes are maintained as children of the relevant IMX-SCU device node. > + This binding uses the i.MX common pinctrl binding. > + (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt) > + > +allOf: > + - $ref: "pinctrl.yaml#" Don't mix the quotes. You changed them to ', so stick with it. > + > +properties: > + compatible: > + enum: > + - fsl,imx8qm-iomuxc > + - fsl,imx8qxp-iomuxc > + - fsl,imx8dxl-iomuxc > + > +patternProperties: > + 'grp$': > + type: object > + description: > + Pinctrl node's client devices use subnodes for desired pin configuration. > + Client device subnodes use below standard properties. > + > + properties: > + fsl,pins: > + description: > + each entry consists of 3 integers and represents the pin ID, the mux value > + and config setting for the pin. The first 2 integers - pin_id and mux_val - are > + specified using a PIN_FUNC_ID macro, which can be found in > + <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer CONFIG is > + the pad setting value like pull-up on this pin. Please refer to the > + appropriate i.MX8 Reference Manual for detailed CONFIG settings. > + $ref: /schemas/types.yaml#/definitions/uint32-matrix Look at fsl,imx8mq-pinctrl.yaml. Each item is described (items under items). > + > + required: > + - fsl,pins > + > + additionalProperties: false > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/pinctrl/pads-imx8qxp.h> > + > + pinctrl { > + compatible = "fsl,imx8qxp-iomuxc"; > + > + pinctrl_lpuart0: lpuart0grp { > + fsl,pins = < > + 111 0 0x06000020 > + 112 0 0x06000020 > + >; > + }; > + }; Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'keys' child node of the SCU main node. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- > .../bindings/input/fsl,scu-key.yaml | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 Documentation/devicetree/bindings/input/fsl,scu-key.yaml > Assuming all patches are taken independently: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'power controller' child node of the SCU main node. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- Assuming all patches are taken independently: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'thermal' child node of the SCU main node. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- Assuming all patches are taken independently: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch adds the > fsl,scu.yaml in the firmware bindings folder. This one is only for > the main SCU node. The old txt file will be removed only after all > the child nodes have been properly switch to yaml. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- > .../devicetree/bindings/firmware/fsl,scu.yaml | 160 ++++++++++++++++++ > 1 file changed, 160 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml > This depends on all other previous patches, so it cannot go independently. Therefore I expect that everything will be going through one tree thus removal of TXT hunks should happen gradually. Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > The proper name is power-controller, not imx8qx-pd. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > The proper name is 'keys', not 'scu-keys'. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 22-06-29 19:51:06, Krzysztof Kozlowski wrote: > On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > > From: Viorel Suman <viorel.suman@nxp.com> > > > > Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ > > * Updated according to Krzysztof Kozlowski comments > > > > My comment a about removal of each part of TXT bindings in each patch, > was not addressed. Your approach makes it more difficult to read patches > and makes sense only if each subsystem maintainer will take the patches > (separately). If the patches are going through one tree, then better to > remove the TXT gradually. > > So the question - who is going to take each of the patches? Hi Krzysztof, I just understood the context of your comment, will do it in the next version. Assuming TXT is removed from aggregating TXT - fsl,scu.txt - gradually, do you expect the removed to be added into the aggregating YAML - fsl,scu.yaml - also gradually within the same patch ? Thank you, Viorel
On 22-06-29 19:53:51, Krzysztof Kozlowski wrote: > On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > > From: Abel Vesa <abel.vesa@nxp.com> > > > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > > we need to split it between the right subsystems. This patch documents > > separately the 'iomux/pinctrl' child node of the SCU main node. > > > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > > --- > > .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ > > 1 file changed, 68 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > new file mode 100644 > > index 000000000000..76a2e7b28172 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml [...] > > + fsl,pins: > > + description: > > + each entry consists of 3 integers and represents the pin ID, the mux value > > + and config setting for the pin. The first 2 integers - pin_id and mux_val - are > > + specified using a PIN_FUNC_ID macro, which can be found in > > + <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer CONFIG is > > + the pad setting value like pull-up on this pin. Please refer to the > > + appropriate i.MX8 Reference Manual for detailed CONFIG settings. > > + $ref: /schemas/types.yaml#/definitions/uint32-matrix > > Look at fsl,imx8mq-pinctrl.yaml. Each item is described (items under items). Added them initially, but later dropped because of some logs like "pinctrl@xxxxxxx: usdhc1grp:fsl,pins:0: [...] is too long" shown by "make dt_binding_check dtbs_check DT_SCHEMA_FILES=[...]/fsl,scu-pinctrl.yaml" Same logs are shown for "fsl,imx8mq-pinctrl.yaml". Will add the items description in the next version. Thank you, Viorel
On Wed, 29 Jun 2022 19:44:02 +0300, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'iomux/pinctrl' child node of the SCU main node. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- > .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.example.dtb: pinctrl@298c0000: lpuart5grp:fsl,pins:0: [312, 2288, 4, 3, 3, 316, 2284, 4, 3, 3] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.example.dtb: pinctrl@30330000: uart2grp:fsl,pins:0: [572, 1188, 1276, 0, 0, 320, 576, 1192, 0, 0, 0, 320] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.example.dtb: pinctrl@443c0000: uart3grp:fsl,pins:0: [72, 504, 1052, 1, 0, 73, 76, 508, 1048, 1, 0, 73] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.example.dtb: pinctrl@30330000: uart2grp:fsl,pins:0: [572, 1188, 1276, 0, 0, 320, 576, 1192, 0, 0, 0, 320] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.example.dtb: pinctrl@30330000: uart5grp:fsl,pins:0: [352, 976, 1812, 1, 0, 126, 356, 980, 0, 1, 0, 118] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.example.dtb: pinctrl@302c0000: gpio1-grp:fsl,pins:0: [8, 56, 0, 0, 0, 89, 12, 60, 0, 0, 0, 89] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.example.dtb: pinctrl@30330000: uart1grp:fsl,pins:0: [564, 1180, 1268, 0, 0, 73, 568, 1184, 1268, 0, 0, 73] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.example.dtb: iomuxc@401f8000: lpuart1grp:fsl,pins:0: [236, 732, 0, 2, 0, 241, 240, 736, 0, 2, 0, 241] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.example.dtb: pinctrl@30330000: uart2grp:fsl,pins:0: [552, 1160, 1520, 0, 6, 73, 552, 1160, 0, 0, 0, 73] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.example.dtb: iomuxc@400e8000: lpuart1grp:fsl,pins:0: [364, 944, 1568, 0, 0, 241, 368, 948, 1564, 0, 0, 241] is too long From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Wed, 29 Jun 2022 19:44:09 +0300, Viorel Suman (OSS) wrote: > From: Abel Vesa <abel.vesa@nxp.com> > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch adds the > fsl,scu.yaml in the firmware bindings folder. This one is only for > the main SCU node. The old txt file will be removed only after all > the child nodes have been properly switch to yaml. > > Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > --- > .../devicetree/bindings/firmware/fsl,scu.yaml | 160 ++++++++++++++++++ > 1 file changed, 160 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: ./Documentation/devicetree/bindings/firmware/fsl,scu.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/fsl,scu.example.dtb: system-controller: clock-controller: False schema does not allow {'compatible': ['fsl,imx8qxp-clk', 'fsl,scu-clk'], '#clock-cells': [[2]]} From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/fsl,scu.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/fsl,scu.example.dtb: system-controller: pinctrl: False schema does not allow {'compatible': ['fsl,imx8qxp-iomuxc'], 'lpuart0grp': {'fsl,pins': [[111, 0, 100663328, 112, 0, 100663328]]}} From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/firmware/fsl,scu.yaml Documentation/devicetree/bindings/firmware/fsl,scu.example.dtb:0:0: /example-0/firmware/system-controller/clock-controller: failed to match any schema with compatible: ['fsl,imx8qxp-clk', 'fsl,scu-clk'] Documentation/devicetree/bindings/firmware/fsl,scu.example.dtb:0:0: /example-0/firmware/system-controller/clock-controller: failed to match any schema with compatible: ['fsl,imx8qxp-clk', 'fsl,scu-clk'] Documentation/devicetree/bindings/firmware/fsl,scu.example.dtb:0:0: /example-0/firmware/system-controller/pinctrl: failed to match any schema with compatible: ['fsl,imx8qxp-iomuxc'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On 30/06/2022 14:13, Viorel Suman (OSS) wrote: > On 22-06-29 19:51:06, Krzysztof Kozlowski wrote: >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: >>> From: Viorel Suman <viorel.suman@nxp.com> >>> >>> Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ >>> * Updated according to Krzysztof Kozlowski comments >>> >> >> My comment a about removal of each part of TXT bindings in each patch, >> was not addressed. Your approach makes it more difficult to read patches >> and makes sense only if each subsystem maintainer will take the patches >> (separately). If the patches are going through one tree, then better to >> remove the TXT gradually. >> >> So the question - who is going to take each of the patches? > > Hi Krzysztof, > > I just understood the context of your comment, will do it in the next version. > > Assuming TXT is removed from aggregating TXT - fsl,scu.txt - gradually, do you expect the > removed to be added into the aggregating YAML - fsl,scu.yaml - also gradually within the > same patch ? Each patch making the conversion should remove the piece being converted. Then finally the patch adding fsl,scu.yaml should remove the last pieces (remaining ones). Best regards, Krzysztof
On 22-06-30 20:03:07, Krzysztof Kozlowski wrote: > On 30/06/2022 14:13, Viorel Suman (OSS) wrote: > > On 22-06-29 19:51:06, Krzysztof Kozlowski wrote: > >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > >>> From: Viorel Suman <viorel.suman@nxp.com> > >>> > >>> Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ > >>> * Updated according to Krzysztof Kozlowski comments > >>> > >> > >> My comment a about removal of each part of TXT bindings in each patch, > >> was not addressed. Your approach makes it more difficult to read patches > >> and makes sense only if each subsystem maintainer will take the patches > >> (separately). If the patches are going through one tree, then better to > >> remove the TXT gradually. > >> > >> So the question - who is going to take each of the patches? > > > > Hi Krzysztof, > > > > I just understood the context of your comment, will do it in the next version. > > > > Assuming TXT is removed from aggregating TXT - fsl,scu.txt - gradually, do you expect the > > removed to be added into the aggregating YAML - fsl,scu.yaml - also gradually within the > > same patch ? > > Each patch making the conversion should remove the piece being > converted. Then finally the patch adding fsl,scu.yaml should remove the > last pieces (remaining ones). Thank you for clarification, will follow this approach in the next version. Regards, Viorel
On 30/06/2022 14:37, Viorel Suman (OSS) wrote: > On 22-06-29 19:53:51, Krzysztof Kozlowski wrote: >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: >>> From: Abel Vesa <abel.vesa@nxp.com> >>> >>> In order to replace the fsl,scu txt file from bindings/arm/freescale, >>> we need to split it between the right subsystems. This patch documents >>> separately the 'iomux/pinctrl' child node of the SCU main node. >>> >>> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> >>> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> >>> --- >>> .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ >>> 1 file changed, 68 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml >>> new file mode 100644 >>> index 000000000000..76a2e7b28172 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > [...] >>> + fsl,pins: >>> + description: >>> + each entry consists of 3 integers and represents the pin ID, the mux value >>> + and config setting for the pin. The first 2 integers - pin_id and mux_val - are >>> + specified using a PIN_FUNC_ID macro, which can be found in >>> + <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer CONFIG is >>> + the pad setting value like pull-up on this pin. Please refer to the >>> + appropriate i.MX8 Reference Manual for detailed CONFIG settings. >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix >> >> Look at fsl,imx8mq-pinctrl.yaml. Each item is described (items under items). > > Added them initially, but later dropped because of some logs like > "pinctrl@xxxxxxx: usdhc1grp:fsl,pins:0: [...] is too long" shown by > "make dt_binding_check dtbs_check DT_SCHEMA_FILES=[...]/fsl,scu-pinctrl.yaml" > > Same logs are shown for "fsl,imx8mq-pinctrl.yaml". Will add the items description in the next > version. > The fsl,imx8mq-pinctrl.yaml should be correct and I don't see the reason why dtschema complains in some of the entries. It's like one define was not correct... I'll take a look at this later, but anyway keep the same as fsl,imx8mq-pinctrl.yaml even if it complains. Best regards, Krzysztof
On 22-07-05 09:28:24, Krzysztof Kozlowski wrote: > On 05/07/2022 02:39, Shawn Guo wrote: > > On Wed, Jun 29, 2022 at 07:51:06PM +0200, Krzysztof Kozlowski wrote: > >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > >>> From: Viorel Suman <viorel.suman@nxp.com> > >>> > >>> Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ > >>> * Updated according to Krzysztof Kozlowski comments > >>> > >> > >> My comment a about removal of each part of TXT bindings in each patch, > >> was not addressed. Your approach makes it more difficult to read patches > >> and makes sense only if each subsystem maintainer will take the patches > >> (separately). If the patches are going through one tree, then better to > >> remove the TXT gradually. > >> > >> So the question - who is going to take each of the patches? > > > > I can take the series through IMX tree if that makes the most sense. > > Sounds fine to me. Then however each piece of TXT file should be removed > in each commit doing that piece conversion. > > Best regards, > Krzysztof Just sent v7 which removes TXT in each commit which does the conversion. Regards, Viorel
On Thu, Jun 30, 2022 at 12:33 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 30/06/2022 14:37, Viorel Suman (OSS) wrote: > > On 22-06-29 19:53:51, Krzysztof Kozlowski wrote: > >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > >>> From: Abel Vesa <abel.vesa@nxp.com> > >>> > >>> In order to replace the fsl,scu txt file from bindings/arm/freescale, > >>> we need to split it between the right subsystems. This patch documents > >>> separately the 'iomux/pinctrl' child node of the SCU main node. > >>> > >>> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > >>> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > >>> --- > >>> .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ > >>> 1 file changed, 68 insertions(+) > >>> create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > >>> > >>> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > >>> new file mode 100644 > >>> index 000000000000..76a2e7b28172 > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > [...] > >>> + fsl,pins: > >>> + description: > >>> + each entry consists of 3 integers and represents the pin ID, the mux value > >>> + and config setting for the pin. The first 2 integers - pin_id and mux_val - are > >>> + specified using a PIN_FUNC_ID macro, which can be found in > >>> + <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer CONFIG is > >>> + the pad setting value like pull-up on this pin. Please refer to the > >>> + appropriate i.MX8 Reference Manual for detailed CONFIG settings. > >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix > >> > >> Look at fsl,imx8mq-pinctrl.yaml. Each item is described (items under items). > > > > Added them initially, but later dropped because of some logs like > > "pinctrl@xxxxxxx: usdhc1grp:fsl,pins:0: [...] is too long" shown by > > "make dt_binding_check dtbs_check DT_SCHEMA_FILES=[...]/fsl,scu-pinctrl.yaml" > > > > Same logs are shown for "fsl,imx8mq-pinctrl.yaml". Will add the items description in the next > > version. > > > > The fsl,imx8mq-pinctrl.yaml should be correct and I don't see the reason > why dtschema complains in some of the entries. It's like one define was > not correct... I'll take a look at this later, but anyway keep the same > as fsl,imx8mq-pinctrl.yaml even if it complains. The issue is that 'fsl,pins' is problematic for the new dtb decoding because it has a variable definition in terms of matrix bounds as each i.MX platform has its own length (typ 5 or 6). The tools try to work around it by figuring out which size fits. That works until there are multiple answers which seems to be what's happening here. The easiest solution I think is to just strip the constraints in occurances of this property. I'll look into that. Rob
On Tue, Jul 5, 2022 at 12:33 PM Rob Herring <robh+dt@kernel.org> wrote: > > On Thu, Jun 30, 2022 at 12:33 PM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: > > > > On 30/06/2022 14:37, Viorel Suman (OSS) wrote: > > > On 22-06-29 19:53:51, Krzysztof Kozlowski wrote: > > >> On 29/06/2022 18:44, Viorel Suman (OSS) wrote: > > >>> From: Abel Vesa <abel.vesa@nxp.com> > > >>> > > >>> In order to replace the fsl,scu txt file from bindings/arm/freescale, > > >>> we need to split it between the right subsystems. This patch documents > > >>> separately the 'iomux/pinctrl' child node of the SCU main node. > > >>> > > >>> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> > > >>> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> > > >>> --- > > >>> .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++++++++++++++++ > > >>> 1 file changed, 68 insertions(+) > > >>> create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > >>> > > >>> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > >>> new file mode 100644 > > >>> index 000000000000..76a2e7b28172 > > >>> --- /dev/null > > >>> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml > > > [...] > > >>> + fsl,pins: > > >>> + description: > > >>> + each entry consists of 3 integers and represents the pin ID, the mux value > > >>> + and config setting for the pin. The first 2 integers - pin_id and mux_val - are > > >>> + specified using a PIN_FUNC_ID macro, which can be found in > > >>> + <include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer CONFIG is > > >>> + the pad setting value like pull-up on this pin. Please refer to the > > >>> + appropriate i.MX8 Reference Manual for detailed CONFIG settings. > > >>> + $ref: /schemas/types.yaml#/definitions/uint32-matrix > > >> > > >> Look at fsl,imx8mq-pinctrl.yaml. Each item is described (items under items). > > > > > > Added them initially, but later dropped because of some logs like > > > "pinctrl@xxxxxxx: usdhc1grp:fsl,pins:0: [...] is too long" shown by > > > "make dt_binding_check dtbs_check DT_SCHEMA_FILES=[...]/fsl,scu-pinctrl.yaml" > > > > > > Same logs are shown for "fsl,imx8mq-pinctrl.yaml". Will add the items description in the next > > > version. > > > > > > > The fsl,imx8mq-pinctrl.yaml should be correct and I don't see the reason > > why dtschema complains in some of the entries. It's like one define was > > not correct... I'll take a look at this later, but anyway keep the same > > as fsl,imx8mq-pinctrl.yaml even if it complains. > > The issue is that 'fsl,pins' is problematic for the new dtb decoding > because it has a variable definition in terms of matrix bounds as each > i.MX platform has its own length (typ 5 or 6). The tools try to work > around it by figuring out which size fits. That works until there are > multiple answers which seems to be what's happening here. > > The easiest solution I think is to just strip the constraints in > occurances of this property. I'll look into that. This is now fixed in the dt-schema main branch. Rob
From: Viorel Suman <viorel.suman@nxp.com> Changes since v5: https://lore.kernel.org/lkml/20220616164303.790379-1-viorel.suman@nxp.com/ * Updated according to Krzysztof Kozlowski comments Changes since v4: https://lore.kernel.org/lkml/20220615105834.743045-1-viorel.suman@nxp.com/ * Missing SoB added Changes since v3: https://lore.kernel.org/lkml/20220609143423.2839186-1-abel.vesa@nxp.com/ * Examples included * Included Abel's patches fixing thermal zone, keys and power controller names. Abel Vesa (13): dt-bindings: clk: imx: Add fsl,scu-clk yaml file dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file dt-bindings: input: Add fsl,scu-key yaml file dt-bindings: nvmem: Add fsl,scu-ocotp yaml file dt-bindings: power: Add fsl,scu-pd yaml file dt-bindings: rtc: Add fsl,scu-rtc yaml file dt-bindings: thermal: Add fsl,scu-thermal yaml file dt-bindings: watchdog: Add fsl,scu-wdt yaml file dt-bindings: firmware: Add fsl,scu yaml file arm64: dts: freescale: imx8: Fix power controller name arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller arm64: dts: freescale: imx8qxp: Fix the keys node name dt-bindings: arm: freescale: Remove fsl,scu txt file Viorel Suman (1): arm64: dts: freescale: imx8qxp: Remove unnecessary clock related entries .../bindings/arm/freescale/fsl,scu.txt | 271 ------------------ .../bindings/clock/fsl,scu-clk.yaml | 43 +++ .../devicetree/bindings/firmware/fsl,scu.yaml | 160 +++++++++++ .../bindings/input/fsl,scu-key.yaml | 40 +++ .../bindings/nvmem/fsl,scu-ocotp.yaml | 57 ++++ .../bindings/pinctrl/fsl,scu-pinctrl.yaml | 68 +++++ .../devicetree/bindings/power/fsl,scu-pd.yaml | 41 +++ .../devicetree/bindings/rtc/fsl,scu-rtc.yaml | 31 ++ .../bindings/thermal/fsl,scu-thermal.yaml | 38 +++ .../bindings/watchdog/fsl,scu-wdt.yaml | 34 +++ arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 8 +- 12 files changed, 516 insertions(+), 277 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml create mode 100644 Documentation/devicetree/bindings/input/fsl,scu-key.yaml create mode 100644 Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/power/fsl,scu-pd.yaml create mode 100644 Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml create mode 100644 Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml create mode 100644 Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml