From patchwork Wed Jun 29 16:44:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Viorel Suman \(OSS\)" X-Patchwork-Id: 586768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C806DCCA47C for ; Wed, 29 Jun 2022 16:46:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231676AbiF2QqS (ORCPT ); Wed, 29 Jun 2022 12:46:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231731AbiF2Qpm (ORCPT ); Wed, 29 Jun 2022 12:45:42 -0400 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2073.outbound.protection.outlook.com [40.107.22.73]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C04F3C704; Wed, 29 Jun 2022 09:45:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=e7YpwVI7oX3oEWy9tHVJCQFfxv3IeRD0/YnXDA6H9Hgo6wAN7Pqv378++FWDeosLJqnyg2OmgSJ/jfwDKrKU2doyrrc2NgzUPtgZJ+GRqTEdhq2GpLmRTlJcR9V2Vlg0uXvHPOb/IXFY9ONRp90eneCQY739zN+j8CbpraGyVVoVHmurB7F4fKwZmPWkigmi7kE6Vh9FsFhKG/E64rE3bgI1hHAqdVjk8kRiK6yVd0OSJ289x5YZw3ZyxinVjXli2QJV/0eaa16WfX9fkAh1RsVRZFQWI6aEDGlNkY0Y9UEZlBtKejfK/ypSCbNPQNt/2SS3ChlRoV5SfNMhGhUp9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=eAoBYu6U67TVxQFwxdx+e5GMNWqrwameUa3lJaMA6VE=; b=ALR+uROjbegxj685utp2T0DecvybQnEGVo5P+zgrIMkd3Dg8HZw0imtobHvD3VOQruZQTuLOho48Mc6yH2kI/aN2gcQiEYg+8Zz7woCujVT1mP+0cVUbT70yKjy96FaQSDDFq7jzuC9fjHi9VtnLlYwdk05U9lj8eGJHTtxOj2AUwj9bHpOMlcjPVm78MOO+g5Lgj6F7gvPO8Bn+1IUAqQPnJbUejzsqNoEuBNzBAIz64P4WUjyfGFQALCY2y5mm/xBaecRCV1ieKXfRoPA0crOfg87GXkTE89OA1DSU1Iu1DwjrAbTQMpiYwnYtIlueWASppyOOWsnnoB4U/ExMFw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=eAoBYu6U67TVxQFwxdx+e5GMNWqrwameUa3lJaMA6VE=; b=BhRfbVFxQnf/fGTDfLMNqM58meN6TkGuV1XLsz+pQpJDzIXucAeBZ5fxR01mWHzE6nKhfolx7Jm8U2onfcVmn++WEVcYqwmltNRdUE1PR3+0GLtFrx1mT1sInbNAf9UDW+x43nOfSdOPi/DGcXSASg13X4cvTMsjYeNs+y/bye0= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) by VI1PR04MB5840.eurprd04.prod.outlook.com (2603:10a6:803:e1::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.18; Wed, 29 Jun 2022 16:45:23 +0000 Received: from VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::6546:3ee1:5e6c:278f]) by VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::6546:3ee1:5e6c:278f%5]) with mapi id 15.20.5373.018; Wed, 29 Jun 2022 16:45:22 +0000 From: "Viorel Suman (OSS)" To: Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Liu Ying , Mirela Rabulea , Peng Fan , Ming Qian , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 09/14] dt-bindings: firmware: Add fsl,scu yaml file Date: Wed, 29 Jun 2022 19:44:09 +0300 Message-Id: <20220629164414.301813-10-viorel.suman@oss.nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220629164414.301813-1-viorel.suman@oss.nxp.com> References: <20220629164414.301813-1-viorel.suman@oss.nxp.com> X-ClientProxiedBy: AM9P195CA0028.EURP195.PROD.OUTLOOK.COM (2603:10a6:20b:21f::33) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c8517bb6-ee67-481a-5d1e-08da59eec277 X-MS-TrafficTypeDiagnostic: VI1PR04MB5840:EE_ X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This patch adds the fsl,scu.yaml in the firmware bindings folder. This one is only for the main SCU node. The old txt file will be removed only after all the child nodes have been properly switch to yaml. Signed-off-by: Abel Vesa Signed-off-by: Viorel Suman --- .../devicetree/bindings/firmware/fsl,scu.yaml | 160 ++++++++++++++++++ 1 file changed, 160 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/fsl,scu.yaml diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml new file mode 100644 index 000000000000..bf13a1e88ecf --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX System Controller Firmware (SCFW) + +maintainers: + - Dong Aisheng + +description: System Controller Device Node + The System Controller Firmware (SCFW) is a low-level system function + which runs on a dedicated Cortex-M core to provide power, clock, and + resource management. It exists on some i.MX8 processors. e.g. i.MX8QM + (QM, QP), and i.MX8QX (QXP, DX). + The AP communicates with the SC using a multi-ported MU module found + in the LSIO subsystem. The current definition of this MU module provides + 5 remote AP connections to the SC to support up to 5 execution environments + (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces + with the LSIO DSC IP bus. The SC firmware will communicate with this MU + using the MSI bus. + +properties: + compatible: + const: fsl,imx-scu + + clock-controller: + description: + Clock controller node that provides the clocks controlled by the SCU + $ref: /schemas/clock/fsl,scu-clk.yaml + + imx8qx-ocotp: + description: + OCOTP controller node provided by the SCU + $ref: /schemas/nvmem/fsl,scu-ocotp.yaml + + keys: + description: + Keys provided by the SCU + $ref: /schemas/input/fsl,scu-key.yaml + + mboxes: + description: | + List of phandle of 4 MU channels for tx, 4 MU channels for + rx, and 1 optional MU channel for general interrupt. + All MU channels must be in the same MU instance. + Cross instances are not allowed. The MU instance can only + be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need + to make sure use the one which is not conflict with other + execution environments. e.g. ATF. + minItems: 1 + maxItems: 10 + + mbox-names: + description: + include "gip3" if want to support general MU interrupt. + minItems: 1 + maxItems: 10 + + pinctrl: + description: + Pin controller provided by the SCU + $ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml + + power-controller: + description: | + Power domains controller node that provides the power domains + controlled by the SCU + $ref: /schemas/power/fsl,scu-pd.yaml + + rtc: + description: + RTC controller provided by the SCU + $ref: /schemas/rtc/fsl,scu-rtc.yaml + + thermal-sensor: + description: + Thermal sensor provided by the SCU + $ref: /schemas/thermal/fsl,scu-thermal.yaml + + watchdog: + description: + Watchdog controller provided by the SCU + $ref: /schemas/watchdog/fsl,scu-wdt.yaml + +required: + - compatible + - mbox-names + - mboxes + +additionalProperties: false + +examples: + - | + #include + #include + #include + + firmware { + system-controller { + compatible = "fsl,imx-scu"; + mbox-names = "tx0", "tx1", "tx2", "tx3", + "rx0", "rx1", "rx2", "rx3", + "gip3"; + mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3 + &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3 + &lsio_mu1 3 3>; + + clock-controller { + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; + #clock-cells = <2>; + }; + + pinctrl { + compatible = "fsl,imx8qxp-iomuxc"; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 + IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 + >; + }; + }; + + imx8qx-ocotp { + compatible = "fsl,imx8qxp-scu-ocotp"; + #address-cells = <1>; + #size-cells = <1>; + + fec_mac0: mac@2c4 { + reg = <0x2c4 6>; + }; + }; + + power-controller { + compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd"; + #power-domain-cells = <1>; + }; + + rtc { + compatible = "fsl,imx8qxp-sc-rtc"; + }; + + keys { + compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key"; + linux,keycodes = ; + }; + + watchdog { + compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; + timeout-sec = <60>; + }; + + thermal-sensor { + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; + #thermal-sensor-cells = <1>; + }; + }; + };