From patchwork Thu Jul 7 12:50:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Viorel Suman \(OSS\)" X-Patchwork-Id: 589184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 790BECCA485 for ; Thu, 7 Jul 2022 12:51:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235506AbiGGMvB (ORCPT ); Thu, 7 Jul 2022 08:51:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234508AbiGGMu6 (ORCPT ); Thu, 7 Jul 2022 08:50:58 -0400 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2085.outbound.protection.outlook.com [40.107.21.85]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A89E829C8A; Thu, 7 Jul 2022 05:50:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=FONDt/r4pgh4JJ06Dsp2J8fPITRKVWqQ8p2RMCZxTX9Q6OERpEcoSk+s1odOnBTapzYMH8CcFV05r6d6EXeeZI9+MOKGiwnAtULIV4+QoKP0+IMuXwpI9BAet/5sHKzn5HvTUghdy6rkZBw8/2qSl4DABqhG3eLzdUZvip/z6z1aycTLd0Hc4NNwIykunvIuZ2IH+sHFjvb7OxuShOZQjC9n0IOSOZcSYNpuPkPujXWqwVlVuuWrHNeo44jwSdxe7DkQgxQ5y1KVtFoywoyhDc9lzRJi9HrNf6jpBhDFoYXsLJgh+Q2igWVBvWQncd0zl5iWqYr/sMFSVxpuU3pkQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Qp5odMkK0cVlovcm2p9ZxncL1AdsW1Jx0NTID7E6cgs=; b=Y4jaCq1m9DaWX5aeiJsMv069x8pCUftePb/WTMIo0OPNynqeam3djRfzp24/sitIBZECKdZiG5ut8Jl3yvqnIBj5Qqjg0SlfbntaaEAwK6tpXVJVwD6P5Wg1q66czhv9gSzhpbk+BtNERBKHgou52ZBc+wifLT9NWQ6PEbS2LgmNPgrslWCLoIaxLE762Les4xLYNwsxhfB/oSR8Se65hbT8r9vFIrv7tKDjqu7JisBtV0h9uNG7UFq2xuB0Xv7LCP+go13S7L3LxM13QL2rHWlKtC12RTcvulppneBXn/iiktnaWlIXeGaG78smYdYSNHcfNfMvuFOEJ4orbyNATw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector2-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Qp5odMkK0cVlovcm2p9ZxncL1AdsW1Jx0NTID7E6cgs=; b=BTt1SB8bPH808vHJ1Y+chEQju7xpBEQNOWosV2y+mcoEhs59metLv1Pt+fHx70XYrajHYA9mkPqhKA8mnpptvZEDprQRD1cHXRMA8fE7y6QqO4dej62HPkmW4nK8WchWQQ1lVZ0OKk0MB83BCJbGc1pVvJRQAbEur9EByL2sGBw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) by AM0PR04MB6418.eurprd04.prod.outlook.com (2603:10a6:208:169::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5417.16; Thu, 7 Jul 2022 12:50:54 +0000 Received: from VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::6546:3ee1:5e6c:278f]) by VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::6546:3ee1:5e6c:278f%5]) with mapi id 15.20.5417.016; Thu, 7 Jul 2022 12:50:54 +0000 From: "Viorel Suman (OSS)" To: Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Peng Fan , Liu Ying , Shijie Qin , Ming Qian , Mirela Rabulea , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Viorel Suman Subject: [PATCH v8 01/15] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Date: Thu, 7 Jul 2022 15:50:08 +0300 Message-Id: <20220707125022.1156498-2-viorel.suman@oss.nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> References: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> X-ClientProxiedBy: AM9P192CA0026.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:21d::31) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8901c54b-59d4-42a8-931d-08da601753ff X-MS-TrafficTypeDiagnostic: AM0PR04MB6418:EE_ X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This patch documents separately the 'clock' child node of the SCU main node. Signed-off-by: Abel Vesa Signed-off-by: Viorel Suman Acked-by: Stephen Boyd Reviewed-by: Krzysztof Kozlowski --- .../bindings/arm/freescale/fsl,scu.txt | 31 ------------- .../bindings/clock/fsl,scu-clk.yaml | 43 +++++++++++++++++++ 2 files changed, 43 insertions(+), 31 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index a87ec15e28d2..ef7f5222ac48 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -79,29 +79,6 @@ Required properties: See detailed Resource ID list from: include/dt-bindings/firmware/imx/rsrc.h -Clock bindings based on SCU Message Protocol ------------------------------------------------------------- - -This binding uses the common clock binding[1]. - -Required properties: -- compatible: Should be one of: - "fsl,imx8dxl-clk" - "fsl,imx8qm-clk" - "fsl,imx8qxp-clk" - followed by "fsl,scu-clk" -- #clock-cells: Should be 2. - Contains the Resource and Clock ID value. -- clocks: List of clock specifiers, must contain an entry for - each required entry in clock-names -- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz" - -The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. - -See the full list of clock IDs from: -include/dt-bindings/clock/imx8qxp-clock.h - Pinctrl bindings based on SCU Message Protocol ------------------------------------------------------------ @@ -127,7 +104,6 @@ Required properties for Pinctrl sub nodes: Please refer to i.MX8QXP Reference Manual for detailed CONFIG settings. -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/power/power-domain.yaml [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt @@ -208,11 +184,6 @@ firmware { &lsio_mu1 1 3 &lsio_mu1 3 3>; - clk: clk { - compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; - #clock-cells = <2>; - }; - iomuxc { compatible = "fsl,imx8qxp-iomuxc"; @@ -265,7 +236,5 @@ serial@5a060000 { ... pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lpuart0>; - clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; - clock-names = "ipg"; power-domains = <&pd IMX_SC_R_UART_0>; }; diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml new file mode 100644 index 000000000000..f2c48460a399 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol + +maintainers: + - Abel Vesa + +description: i.MX SCU Client Device Node + Client nodes are maintained as children of the relevant IMX-SCU device node. + This binding uses the common clock binding. + (Documentation/devicetree/bindings/clock/clock-bindings.txt) + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See the full list of clock IDs from + include/dt-bindings/clock/imx8qxp-clock.h + +properties: + compatible: + items: + - enum: + - fsl,imx8dxl-clk + - fsl,imx8qm-clk + - fsl,imx8qxp-clk + - const: fsl,scu-clk + + '#clock-cells': + const: 2 + +required: + - compatible + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; + #clock-cells = <2>; + };