From patchwork Tue Nov 8 03:32:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 624212 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A784C433FE for ; Tue, 8 Nov 2022 03:32:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232741AbiKHDcZ (ORCPT ); Mon, 7 Nov 2022 22:32:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232529AbiKHDcX (ORCPT ); Mon, 7 Nov 2022 22:32:23 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79B8A2F390; Mon, 7 Nov 2022 19:32:19 -0800 (PST) X-UUID: 3c9f5c1cc69e494dadab7a4072d6d27d-20221108 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Zk0HSy3TaveQBxq2iNOnCPmUUZl44elFjK7RBgpyTL0=; b=u+fQJmlie7WAgua6BZTPgbwsY+ciL+R8fLHTppjX5fAzsC3vPjqLHWjsfeH3ulG/sMDuBKwkyYbT7sGwFjVTZjAEoZqV38ythRKOsykKi8viqMuVBFxsOlT/Wk52l+yS8g6KYTU2hJkouDlaV8LD3cwHmfgm+yoS53fjFNgziDQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12, REQID:a771f832-5eaa-4c57-8f12-b5a812f0e193, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.12, REQID:a771f832-5eaa-4c57-8f12-b5a812f0e193, IP:0, URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:62cd327, CLOUDID:d9aee490-1a78-4832-bd08-74b1519dcfbf, B ulkID:2211081132179AXGOQ7R,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 3c9f5c1cc69e494dadab7a4072d6d27d-20221108 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 120201075; Tue, 08 Nov 2022 11:32:14 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 8 Nov 2022 11:32:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 8 Nov 2022 11:32:12 +0800 From: Allen-KH Cheng To: Wim Van Sebroeck , Guenter Roeck , Krzysztof Kozlowski , "Matthias Brugger" , Rob Herring CC: , , , , , , , , Allen-KH Cheng Subject: [PATCH v5 3/7] arm64: dts: mediatek: mt7986: Fix watchdog compatible Date: Tue, 8 Nov 2022 11:32:05 +0800 Message-ID: <20221108033209.22751-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> References: <20221108033209.22751-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org MT7986's watchdog embeds a reset controller and needs only the mediatek,mt7986-wdt compatible string as the MT6589 one is there for watchdogs that don't have any reset controller capability. Fixes: 50137c150f5f ("arm64: dts: mediatek: add basic mt7986 support") Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 72e0d9722e07..6a94cd618772 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -119,8 +119,7 @@ }; watchdog: watchdog@1001c000 { - compatible = "mediatek,mt7986-wdt", - "mediatek,mt6589-wdt"; + compatible = "mediatek,mt7986-wdt"; reg = <0 0x1001c000 0 0x1000>; interrupts = ; #reset-cells = <1>;