From patchwork Sun Mar 10 19:21:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 779395 Received: from mout.gmx.net (mout.gmx.net [212.227.15.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B959B3B190; Sun, 10 Mar 2024 19:22:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=212.227.15.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710098558; cv=none; b=p+6U9MDEX3DFT+azFHZf4PYI3ooGL1Rox+F/XVxltbufzjqeJscnNm5w/1Tq0qMl8E5r32r8Hid/5jLJ5rv92yPewp5i/ckwCGIuD5IA3dEkv+NpgPXAljlPsM6cFrPZVz3Y6AafxJhZ3OkkfXjjgIN3S23EyzOitrNEgaH+U5s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710098558; c=relaxed/simple; bh=Lc1pMRgsV+StSf5fgFNpvmYafFqXYMKdh+E4JPDHkIM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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b=Bd00TvnksM/H/dFC7U9XfpC05A/9jT7hukPQ2gkucaZ0ksg0dOFrwv+ho/g8rSS7 4MDMbtvRGrIKcfyAzGa1Tp/A+Yj6TwkzaCE6pi1SCHrUERVE9cnDbnSDofxh1al3E rkl4KhTXRv6hwezrAJ/bp/W9twYdNpH07VCqZ5TmWw9RXdzSOPnssaAuefEoDhOXW sBLR2ZC16QYBG0t/eJrzegG0mA6OFBBk4NNba2fEpHMCIB/QH0HcNNrOgDvUBW53u Vwh2K1n3ywZWxNI6WoTKcYhQD1TJTBCmeeLlgyoqoAKDsN4cDvL45LB7LzqrPm5ug My8FLUILVcDCgItSkA== X-UI-Sender-Class: 724b4f7f-cbec-4199-ad4e-598c01a50d3a Received: from probook ([78.35.216.168]) by mail.gmx.net (mrgmx004 [212.227.17.190]) with ESMTPSA (Nemesis) id 1MgNh7-1rBBBJ0KLv-00hvec; Sun, 10 Mar 2024 20:22:06 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-clk@vger.kernel.org, openbmc@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Daniel Lezcano , Thomas Gleixner , Philipp Zabel , Wim Van Sebroeck , Guenter Roeck , Christophe JAILLET , Conor Dooley Subject: [PATCH v10 4/4] ARM: dts: wpcm450: Switch clocks to clock controller Date: Sun, 10 Mar 2024 20:21:02 +0100 Message-ID: <20240310192108.2747084-5-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240310192108.2747084-1-j.neuschaefer@gmx.net> References: <20240310192108.2747084-1-j.neuschaefer@gmx.net> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Provags-ID: V03:K1:CZOP/2JyhuYMjvSoJftgiK/2nFIgRon1+neVh/LZn4z7J6VfK+Y phi/XYNwa4bSKC6jy9/3KudhpuaCSWhKSnAvYt0goG/vWKXb0E9SIIDCkWj6VF420nX5Wa6 Np3/bXESt4ZTzvjlR4m8nFawznti+83B1GljuO5cYG8N+gcWJbGj0tbZN83upD3iWlEP/GK ZseouWgpoYKKzhSS+0NvQ== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:Z1xVzBzNInU=;NDd8KIAFtG7HWYEYhvWCeKkhzkg NR4AV0H13INfVrpjhwXC58BnoZ9BO0Pd7rlvVV7zHg6e4zIaFlWNTJdA/A8f4BgdOfJ9ktPP6 QqK5ejKFY10a+I4iMJJGejcV3a+SrTO9zpsfDVQb0VIxKK86ASPEPp4fwk7/J7mSkdlH0wK9P YtHGsxbGZjEke4jWPANODol+gbw9kss6Ss8tyIHuKSZydKmflu2//O1sBnq4T9+y3Tjlio2dm jYY6FOQXaRGW9Zk/gmI09EyJibKgH/5zKrgEU8pO4Hu+8fHK6Qh10Vcps0mJb1oeKj6wFv5ZC WNJRGcISk2Eh0Ysk4M1uV7yvsarMCM5fR3n2tzoGXsX+1foHqZXS576AZsrSw5ynFAbCxkggm emkpnbcHLc+QWDHu50F3Y1oFMi69XHBxNSJCEgZd2Ir4DCFhURDKNQHKuH0WEnyH29wIxt31X X/U4/gwnhWu4tyBhu87sCfy0shO0QoZujirC2qGi8QnjTRCSDOdkB2PW61ReZnKsPIF6Dm0Bw tjje3eZeo5GugTsLZ5zwXJhYE4QnOUvd5AC/yz3PHyhQqZJsHrUMHVDJ4hlcknbJmNjEKUExq XBGIgii743CONhs6aCeaV/BWGaWzabALOrlBqKYSckZEmYMh+IGWpfmquVmgOMI0ocCybdEcJ oyr0KReDfa/BxUOmt6nQEFmWm8CAJZASMSVJJ1ihksLBmQizhCmhwQ3BPRmeZaf1EjH6V45sx Vh1dfapk8lzU01ai5YOFjUb3zugW3Kykxay3BYEPcFfTaT0TrYn2NCmIKj6ZSV41iWhdCIn8i jcqiGnSqb+Fe8nYJnkuSklRF2KYvU7DayUP18+6ecTTXA= This change is incompatible with older kernels because it requires the clock controller driver, but I think that's acceptable because WPCM450 support is generally still in an early phase. Signed-off-by: Jonathan Neuschäfer --- It's probably best to delay merging of this patch until after the driver is merged; I'm including it here for review, and in case someone want's to set up a shared branch between the clock and devicetree parts. v10: - Reintroducing this patch as part of the clock/reset controller series --- .../arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi | 22 +++++++++---------- 1 file changed, 10 insertions(+), 12 deletions(-) -- 2.43.0 diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi index 9dfdd8f67319d3..7e3ea8b31151b3 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton/nuvoton-wpcm450.dtsi @@ -2,6 +2,7 @@ // Copyright 2021 Jonathan Neuschäfer #include +#include / { compatible = "nuvoton,wpcm450"; @@ -30,13 +31,6 @@ cpu@0 { }; }; - clk24m: clock-24mhz { - /* 24 MHz dummy clock */ - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - }; - refclk: clock-48mhz { /* 48 MHz reference oscillator */ compatible = "fixed-clock"; @@ -70,7 +64,7 @@ serial0: serial@b8000000 { reg = <0xb8000000 0x20>; reg-shift = <2>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_UART0>; pinctrl-names = "default"; pinctrl-0 = <&bsp_pins>; status = "disabled"; @@ -81,7 +75,7 @@ serial1: serial@b8000100 { reg = <0xb8000100 0x20>; reg-shift = <2>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_UART1>; status = "disabled"; }; @@ -89,14 +83,18 @@ timer0: timer@b8001000 { compatible = "nuvoton,wpcm450-timer"; interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; reg = <0xb8001000 0x1c>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_TIMER0>, + <&clk WPCM450_CLK_TIMER1>, + <&clk WPCM450_CLK_TIMER2>, + <&clk WPCM450_CLK_TIMER3>, + <&clk WPCM450_CLK_TIMER4>; }; watchdog0: watchdog@b800101c { compatible = "nuvoton,wpcm450-wdt"; interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; reg = <0xb800101c 0x4>; - clocks = <&clk24m>; + clocks = <&clk WPCM450_CLK_WDT>; }; aic: interrupt-controller@b8002000 { @@ -480,7 +478,7 @@ fiu: spi-controller@c8000000 { #size-cells = <0>; reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>; reg-names = "control", "memory"; - clocks = <&clk 0>; + clocks = <&clk WPCM450_CLK_FIU>; nuvoton,shm = <&shm>; status = "disabled"; };