From patchwork Sun Sep 15 07:58:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 828966 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03F3814A4D1; Sun, 15 Sep 2024 08:09:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726387760; cv=none; b=dlVdPPlhl6fRhYMcZ4GHECAvfExh4/jD/kSXq76Yz4SlpNxufQ+Dvxrn6xFqvrgs8Qk3JC1PPrKuzhJJ9+ynUmSfWMgtX5+09vsCnHBXBjaBoXKoMt4VT0VYPPVEuDB7YFzA7kYSbjLHQpynrK//IvETmnv5K4B3VSZqZigPHQg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726387760; c=relaxed/simple; bh=NfqTBydAA0rKMiZnyRSlqFNySlKJi4oZqmgz8LNyO2g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bETqRuDabvzhT6m2I9tq8uJKfOqOig/IMNoRMMVjfpU5EAdlZBlJnrAYFr34teHn9VR22x9Hzg6TrTxU7m6sb25NdnMkw7p5P1rZ/TBaU4AkCpGLV+Zzvek2co7yxO2CiMsBrU18WUXNwOUBSJZMi/98mY3LUVBTYy7mlYsbDaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=BpM8rPax; arc=none smtp.client-ip=209.85.214.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BpM8rPax" Received: by mail-pl1-f170.google.com with SMTP id d9443c01a7336-20551e2f1f8so25265985ad.2; Sun, 15 Sep 2024 01:09:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726387758; x=1726992558; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1JaHrE84SeLnrWstAmxcdP4iah3z08QyGA/MrMQUQbU=; b=BpM8rPaxDucetfSnjopI66dm8UswO3tdIjmo0Mj+1sI+Y/VZBcSNE9t+s+ELJb+5ee Dp9LU1gmb46GMTmd5chGpdV0Asw/038FYs2SrGmadnx1rlhPYZVX4pCy/51+4SYs+o3o tjnLK171eV+OPmj18qIozbk0ykhS2CL5dFDErct8kqGPOKEbqKRLH9dG5YS+MJHnFaCK XL6h5F6ylDdxOOsH2/xxMEYSf7E+ZS4By2iv9qBtMs9pi0nqHmNg7toE0zGymwxci8lg MzligN9eI2UBqK79eQ7rbBrbPk6O7Jg+Z9a/mQl2ur/SqucJO0UCRYs593pTl/sjtdlL WOWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726387758; x=1726992558; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1JaHrE84SeLnrWstAmxcdP4iah3z08QyGA/MrMQUQbU=; b=LNdicmOz6dEW5SxnlSdmofksrgBlCmKdtgI5QSsbkqjd166k63ec/zoLCVm1iyD7r+ XaN3wA443pPKshajly+R9EwdDWSqs3bACPrAYlgLLjK/sdUpwtCGUZVSJtcp9uHDsB2s F+r6bcbaG5Vyxb+Rbp6yCPNufd/fMMqJXr3vIRnfiuDfMhdL5qNwisJ8e356zZQWse/+ 2TPc8xALKwbHNj0Lhup6xn+S6s44SDqX5FqGgkwHRXalED8TwERyeklHWpUorftusE1S zMchynghT+WAqXIxYfDHDgMZmhqgIyLGy27bqRzyJrP/kybJl7vI9YJFuNY2Mmy5Fiyk X2hQ== X-Forwarded-Encrypted: i=1; AJvYcCVIUif3E7uAoHgkcawM2hiMMSbeI02eI+X1HCqkK4fbYan5SXR2ipsOIVEU5mqjNO9SprcMjMLljpvK@vger.kernel.org, AJvYcCWmmOme805pJqGpgwGJu26acb3pKAM6F8l5F8ZPul3Nd5MrViY8rlaWnFS60IvWqtThmNpraCzJ6E5Vs4rwSNk=@vger.kernel.org, AJvYcCWvFOLHTcPe0iCI7mwzPS9HXT7o6uida1c2LlZfmFyYqVqenMQKGVX5bM/c9muUPcz9plLGwmZN4JI=@vger.kernel.org, AJvYcCX5jmFkLyBFSOf4u5538m4MzDO7EkRqG7HxOtvhiNND0Av8shi3dC7Dobs35gzWXccYGAedzf6SzeIn6upv@vger.kernel.org, AJvYcCXsc0fxOoW2IvU2a7A0rZgY+gMjWqZEMrP04xw6H1GKitVHkE24icCX4UUkF6i/2WBZBLGvFyjO4/09rw==@vger.kernel.org X-Gm-Message-State: AOJu0YzVfaLkgohjKpn3MpEigkdYlh4VI5/l9eUkVsUBgurEsSXdVs1c 2cmDXAPluu1gWl5cDE8tk3uAXC1fMawLVm+gDZkxKW68B2EhoEsb X-Google-Smtp-Source: AGHT+IFwjnKjC0Xpcu0R2oTvo0J2MKunIMviSRIB+k+hk0EO4NtbVAdD5HCuWQSKDgy05NZBdVaxyQ== X-Received: by 2002:a17:903:183:b0:205:5136:b2fb with SMTP id d9443c01a7336-207820529dcmr142698255ad.23.1726387758454; Sun, 15 Sep 2024 01:09:18 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-207945db012sm18248865ad.19.2024.09.15.01.09.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Sep 2024 01:09:18 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Viresh Kumar , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: Nick Chan , Ivaylo Ivanov , Konrad Dybcio Subject: [PATCH v3 14/20] arm64: dts: apple: Add A8X devices Date: Sun, 15 Sep 2024 15:58:59 +0800 Message-ID: <20240915080733.3565-15-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240915080733.3565-1-towinchenmi@gmail.com> References: <20240915080733.3565-1-towinchenmi@gmail.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Konrad Dybcio Add DTS files for the A8X SoC and the only device based on it, the iPad Air 2. Signed-off-by: Konrad Dybcio [Nick: SMP, m1n1 and gpio-keys support, pinctrl fixes] Co-developed-by: Nick Chan Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/Makefile | 2 + arch/arm64/boot/dts/apple/t7001-air2.dtsi | 46 +++++++ arch/arm64/boot/dts/apple/t7001-j81.dts | 14 ++ arch/arm64/boot/dts/apple/t7001-j82.dts | 14 ++ arch/arm64/boot/dts/apple/t7001.dtsi | 154 ++++++++++++++++++++++ 5 files changed, 230 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t7001-air2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-j81.dts create mode 100644 arch/arm64/boot/dts/apple/t7001-j82.dts create mode 100644 arch/arm64/boot/dts/apple/t7001.dtsi diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile index d5dd1e2e4f4c..adda522ea490 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_APPLE) += t7000-j97.dtb dtb-$(CONFIG_ARCH_APPLE) += t7000-n102.dtb dtb-$(CONFIG_ARCH_APPLE) += t7000-n56.dtb dtb-$(CONFIG_ARCH_APPLE) += t7000-n61.dtb +dtb-$(CONFIG_ARCH_APPLE) += t7001-j81.dtb +dtb-$(CONFIG_ARCH_APPLE) += t7001-j82.dtb dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb diff --git a/arch/arm64/boot/dts/apple/t7001-air2.dtsi b/arch/arm64/boot/dts/apple/t7001-air2.dtsi new file mode 100644 index 000000000000..8ecf2842e8e5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-air2.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 common device tree + * Copyright (c) 2022, Konrad Dybcio + */ + +#include "t7001.dtsi" +#include + +/ { + chassis-type = "tablet"; + + gpio-keys { + compatible = "gpio-keys"; + + button-home { + label = "Home Button"; + gpios = <&pinctrl 0 GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + }; + + button-power { + label = "Power Button"; + gpios = <&pinctrl 1 GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + }; + + button-volup { + label = "Volume Up"; + gpios = <&pinctrl 92 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + button-voldown { + label = "Volume Down"; + gpios = <&pinctrl 93 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&serial0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001-j81.dts b/arch/arm64/boot/dts/apple/t7001-j81.dts new file mode 100644 index 000000000000..ca90dc0c872c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-j81.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 (Wi-Fi), J81, iPad5,3 (A1566) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7001-air2.dtsi" + +/ { + compatible = "apple,j81", "apple,t7001", "apple,arm-platform"; + model = "Apple iPad Air 2 (Wi-Fi)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001-j82.dts b/arch/arm64/boot/dts/apple/t7001-j82.dts new file mode 100644 index 000000000000..d9fd16f48db7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001-j82.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iPad Air 2 (Cellular), J82, iPad5,4 (A1567) + * Copyright (c) 2022, Konrad Dybcio + */ + +/dts-v1/; + +#include "t7001-air2.dtsi" + +/ { + compatible = "apple,j82", "apple,t7001", "apple,arm-platform"; + model = "Apple iPad Air 2 (Cellular)"; +}; diff --git a/arch/arm64/boot/dts/apple/t7001.dtsi b/arch/arm64/boot/dts/apple/t7001.dtsi new file mode 100644 index 000000000000..9a5f0a4bde52 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t7001.dtsi @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T7001 "A8X" SoC + * + * Copyright (c) 2022, Konrad Dybcio + * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. + */ + +#include +#include +#include +#include + +/ { + interrupt-parent = <&aic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial0; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0"; + + framebuffer0: framebuffer@0 { + compatible = "apple,simple-framebuffer", "simple-framebuffer"; + reg = <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status = "disabled"; + }; + }; + + clkref: clock-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "clkref"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "apple,typhoon"; + reg = <0x0 0x0>; + cpu-release-addr = <0 0>; /* To be filled in by loader */ + enable-method = "spin-table"; + device_type = "cpu"; + }; + + cpu1: cpu@1 { + compatible = "apple,typhoon"; + reg = <0x0 0x1>; + cpu-release-addr = <0 0>; /* To be filled in by loader */ + enable-method = "spin-table"; + device_type = "cpu"; + }; + + cpu2: cpu@2 { + compatible = "apple,typhoon"; + reg = <0x0 0x2>; + cpu-release-addr = <0 0>; /* To be filled by loader */ + enable-method = "spin-table"; + device_type = "cpu"; + }; + }; + + memory@800000000 { + device_type = "memory"; + reg = <0x8 0 0 0>; /* To be filled in by loader */ + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * The bootloader reserves a region for the (varying-address, depending + * on what FW your device runs AND model) framebuffer under this node. + */ + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + nonposted-mmio; + ranges; + + serial0: serial@20a0c0000 { + compatible = "apple,s5l-uart"; + reg = <0x2 0x0a0c0000 0x0 0x4000>; + reg-io-width = <4>; + interrupt-parent = <&aic>; + interrupts = ; + /* Use the bootloader-enabled clocks for now. */ + clocks = <&clkref>, <&clkref>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + wdt: watchdog@20e027000 { + compatible = "apple,t7000-wdt", "apple,wdt"; + reg = <0x2 0x0e027000 0x0 0x1000>; + clocks = <&clkref>; + interrupt-parent = <&aic>; + interrupts = ; + }; + + aic: interrupt-controller@20e100000 { + compatible = "apple,t7000-aic", "apple,aic"; + reg = <0x2 0x0e100000 0x0 0x100000>; + #interrupt-cells = <3>; + interrupt-controller; + }; + + pinctrl: pinctrl@20e300000 { + compatible = "apple,t7000-pinctrl", "apple,pinctrl"; + reg = <0x2 0x0e300000 0x0 0x100000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 184>; + apple,npins = <184>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&aic>; + interrupt-names = "phys", "virt"; + /* Note that A8X doesn't actually have a hypervisor (EL2 is not implemented). */ + interrupts = , + ; + }; +};