From patchwork Mon Mar 15 13:24:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?SsOpcsO0bWUgUG91aWxsZXI=?= X-Patchwork-Id: 402257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25AEFC43333 for ; Mon, 15 Mar 2021 13:26:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EDFBC64EF2 for ; Mon, 15 Mar 2021 13:26:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230501AbhCON0O (ORCPT ); Mon, 15 Mar 2021 09:26:14 -0400 Received: from mail-dm3nam07on2085.outbound.protection.outlook.com ([40.107.95.85]:32014 "EHLO NAM02-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230247AbhCONZo (ORCPT ); Mon, 15 Mar 2021 09:25:44 -0400 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HPPgmwNcSqHK0li/Q28E0ef41Cbjpc/6mB5FBtb9uGjMFibQeUJPMpHxR2lgfiMciMlZxp/R0gROFJQ6tRHPqOtCN4rhOY5srjTO7m6L14K09oYuiojXgzrw7UGIubJytQCkIShxDTA1eV15I3Huzf5x8k9hH9Rk1qfSQ4xsNe9DS2e1bXhu3NVp+MfB+Nk/R4wD+vFxFnZscHqHhO1JsGK9p8IbvGasccVgaE7H/QxBmosY2h4jOySgb9g6pMx0uJT2svm7uN4gYT2j6bXxtUQlz1f2KSSA5fuAq0NhRXbf/FG3tWd4L/InLGsHr55y0SNDyHd3lC8dmz4XE6msig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8v7raRCXf3w/9ZoD1VSPxWhvEKIdclE07S8bVHwxy98=; b=ghTLONklQ3p+T5PuAUS2TCEsB00FhV6NUum0s+duHVZkFgS1c2c3jY54a1ll6fgasZ6XUzcuIDn6O9DguBiMciBbwqpSFM3GH6FgH8kGjCF573MNSu0Oe4HoVzsgsFo490Lxo1ajm11RGwjgXuT55kZzbXxLfH3m4evRsyguPEywe4sEveBaWiiCta2XFcXlokLCeM38kGr7IWg+8kegWZRW3piyoM7kCLubN64HVDCN1kx/AzotQ5Bu0fSUOTPZqL7vKXvL3j5pnSYukvq5DXrNexDX8HnNlTO9rA6WdtOnUwTHkL37QdeMnxpCta9vYfc8cA31OqsEKnGEIZKykw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=silabs.com; dmarc=pass action=none header.from=silabs.com; dkim=pass header.d=silabs.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=silabs.onmicrosoft.com; s=selector2-silabs-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8v7raRCXf3w/9ZoD1VSPxWhvEKIdclE07S8bVHwxy98=; b=VOV3+nPceLpTQgbIsvbMRW9fmqOUujP49P/RVA3Y3IUyOYB0/h2Mgtlcw7R7wT+I+8eRoQH1STJsJWLwzOkE5Y3dR25nkUxRx7KLZA751wLvOWqmsKoA/0i9kVRLf4EslnAZbp4Nh+FjiX/lPoixnmwbbx9tcyGp1haMPncOg08= Authentication-Results: vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=none action=none header.from=silabs.com; Received: from SN6PR11MB2718.namprd11.prod.outlook.com (2603:10b6:805:63::18) by SN6PR11MB3117.namprd11.prod.outlook.com (2603:10b6:805:d7::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.32; Mon, 15 Mar 2021 13:25:42 +0000 Received: from SN6PR11MB2718.namprd11.prod.outlook.com ([fe80::41bc:5ce:dfa0:9701]) by SN6PR11MB2718.namprd11.prod.outlook.com ([fe80::41bc:5ce:dfa0:9701%7]) with mapi id 15.20.3933.032; Mon, 15 Mar 2021 13:25:41 +0000 From: Jerome Pouiller To: linux-wireless@vger.kernel.org, netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Greg Kroah-Hartman , Kalle Valo , "David S . Miller" , devicetree@vger.kernel.org, Rob Herring , linux-mmc@vger.kernel.org, =?utf-8?q?Pali_Roh=C3=A1r?= , Ulf Hansson , =?utf-8?b?SsOpcsO0bWUg?= =?utf-8?q?Pouiller?= Subject: [PATCH v5 07/24] wfx: add bus_spi.c Date: Mon, 15 Mar 2021 14:24:44 +0100 Message-Id: <20210315132501.441681-8-Jerome.Pouiller@silabs.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210315132501.441681-1-Jerome.Pouiller@silabs.com> References: <20210315132501.441681-1-Jerome.Pouiller@silabs.com> X-Originating-IP: [2a01:e35:2435:66a0:544b:f17b:7ae8:fb7] X-ClientProxiedBy: SN4PR0801CA0014.namprd08.prod.outlook.com (2603:10b6:803:29::24) To SN6PR11MB2718.namprd11.prod.outlook.com (2603:10b6:805:63::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from pc-42.silabs.com (2a01:e35:2435:66a0:544b:f17b:7ae8:fb7) by SN4PR0801CA0014.namprd08.prod.outlook.com (2603:10b6:803:29::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3933.32 via Frontend Transport; Mon, 15 Mar 2021 13:25:39 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ab031fe8-454d-4e2b-f3ae-08d8e7b5d489 X-MS-TrafficTypeDiagnostic: SN6PR11MB3117: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2089; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: D8gbv/qztCMiaXGDsSGDY3gFOtLkQPXfwvlfeyLWq6BK/HAlG3/G8qqcay9QHTYrWjm1Ty0R+i8wqJ2TilnXQgG7S9FpPwhdCSCIItmo1FdxraJuYDrCghKGYMZG0meWxWNZLJ47r4mqK0zdgxFEjzH7WGtXHHoSr+aFn/kCiDLtxT0D3TVpl8w2SLeh1LzCi8NH8DN86zsWV9CRSPXY/14PsoCrA2dzBVC7Ky8f58aisrcvz77OaJg98AeCCl/A6txcSMD2gt56+eS4s3tlRMvmvjPaY4dYrkpb9QKnaxys+74TSfqc4NBF+vrzCrn7DPCKlsOc72ScHp8njQM7ij5Cyi+T0O07jCtBJRXtD1WuXoXNm7/+eUMQGnHWgR21I6rG5A/b1QsJcWt+v3wB1yC2kSIDps/1wgXaLnZ2lMhlEZeYBOrzNJnR2Pa+zHGCfSbCmat23f8KmT4zzGx2B7cUT+Ndd03sp9/0hMpyIpkRrfr4axvbVViY5Stbh0Kg4b/lAaRp7ONtZfaTTKR8GQdxX6hU8FeB0rguheHslETwW4Ci9ZF5aI4IZUZ0hg/I X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SN6PR11MB2718.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(136003)(396003)(39850400004)(376002)(346002)(366004)(1076003)(7696005)(54906003)(2906002)(66946007)(52116002)(316002)(86362001)(16526019)(107886003)(6666004)(7416002)(66556008)(2616005)(8676002)(478600001)(6486002)(186003)(8936002)(66574015)(83380400001)(5660300002)(4326008)(36756003)(66476007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?JL+cFrOLrRdd8pH2WlmNeZ2NC4j?= =?utf-8?q?hVm+BU7zmL3bHjcKiFA+52VF/A2eTHanZ8hUdgexhGr0MHPXUt/AWNWe?= =?utf-8?q?zJvLeHtTeWSpycWZphPpm6M7aaxiRiAsTzQ1qyJOg4ZF0r0Dz9UFXIAC?= =?utf-8?q?LZIoxx2SYdOzzrcZrRCO720sgI4OaBzVdxpTAwzh33oP/goHjUeuAQvf?= =?utf-8?q?KBPiQj11NsGjGaaG6LFLA2j5+AI0F5P6RlgXlTOzhsrlczs/w/rWuM1L?= =?utf-8?q?7ZQbKFiZ0S63qlRvC1ZaeKup1WtTUxIgUqHbnIyMky4g7zVw4ey5C7c3?= =?utf-8?q?hOYdCSTRPG5JAUjytA++q9FYr8bdozepIm0xGXVfwAl64oTRTPvb0a3v?= =?utf-8?q?DbT8QPIC17ea3XjYdpqvsKdBvIFjjI5nye7wfmbBVBi7sypN2vTa8ZyZ?= =?utf-8?q?iqNbA+ZgBO6Oa0kPUTvy609C1i6b6wceHE+fSvv1Roanjt3ngbnOQGFk?= =?utf-8?q?3s+cDjzHY3JzwzSki5ftrWthwuVdydYE+tXFyYKokdf5TZePXQaeaNmr?= =?utf-8?q?kAbuQHHz8WYUOAOmSF6A8qTDD/tZPIclSh6oJD46+QCWfpflADvlz1MW?= =?utf-8?q?VunM/jRwzbQnq/Ntz0XdDJ1uxViIgHjaD/tHm6bObJYViS8wZToAK0Ib?= =?utf-8?q?ZHmxlysMPytjzMrr0dkJDazfP8TzXnutbgxP4tgT/HM+hmcZGo0rZjcJ?= =?utf-8?q?rR4aCGz11XxR0K7tSYg4/fl9X3O5mfVU3rYIK8PXvJ3SLbGLSi3q9158?= =?utf-8?q?9z9PNhUaifFyy6AvWwKdDTqlzLW6jZBSNsq9MjUjKZvixD/ekK6ozaXY?= =?utf-8?q?/mrIbLTaoE7SD+KclWQCu5TAr2NtP9dhDdBHyhRSpF1ssWgtMJL+pQze?= =?utf-8?q?tGc5F7aem+Rl92O7gNcinqCUB5waWweIRU088xIWEN38vgM/LdyzKSBy?= =?utf-8?q?99TX1a6ddF2PBZmArfDoyc8zadshnV9/2pHgc+ZCPUkwGkVQYTjYxc9Q?= =?utf-8?q?a4FTF5McHSCgw3dY/R6W7jf0X5ip9HLldj2rH2Pvzc+DSKDAXpPghHez?= =?utf-8?q?XxdKl+5k8uPpa7k0WyGiqZ7UnZvIVVIOdMY68nzCKDgoMNQVVQ3qOUy1?= =?utf-8?q?xyfIONWGO85NujlVZEV47xR/JlWyH2Dkve2gbkzcOdn2YAQhAk0x1Qgx?= =?utf-8?q?htBfph50v6Aq+ZsS5ISVpuaPAukPwE0CExFq9dvoBcJFDN59xTcIsYBV?= =?utf-8?q?EhbPA675lWLTkiSDay+Lj99blheCEoIuW0jqN9XIWWKMqDipLdnoZunG?= =?utf-8?q?j+F8neYmzn26FyYOmLuzeGCvfzRjyjQE25Aw4uE1K6DGoxIqVsUrqVO3?= =?utf-8?q?zmEAwXh4wjcdg9Q0J6eb5VB8D12vhTNtghNQv75ODJBX5CHyTyEEuG5w?= =?utf-8?q?Bi9DuPHAXFdAqhO1ImFaE8b+j7+eSMUhrwHi8?= X-OriginatorOrg: silabs.com X-MS-Exchange-CrossTenant-Network-Message-Id: ab031fe8-454d-4e2b-f3ae-08d8e7b5d489 X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB2718.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Mar 2021 13:25:41.8270 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 54dbd822-5231-4b20-944d-6f4abcd541fb X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: BOH6MdgiLe4Ym5cYWINRSTWfJ9bEIxm9NamtXSbKAiRupPLIyaZhorwqx7CtWgZZGNYMBapmVBfTIzewBpTkUw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR11MB3117 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Jérôme Pouiller Signed-off-by: Jérôme Pouiller --- drivers/net/wireless/silabs/wfx/bus_spi.c | 271 ++++++++++++++++++++++ 1 file changed, 271 insertions(+) create mode 100644 drivers/net/wireless/silabs/wfx/bus_spi.c diff --git a/drivers/net/wireless/silabs/wfx/bus_spi.c b/drivers/net/wireless/silabs/wfx/bus_spi.c new file mode 100644 index 000000000000..56375004c920 --- /dev/null +++ b/drivers/net/wireless/silabs/wfx/bus_spi.c @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SPI interface. + * + * Copyright (c) 2017-2020, Silicon Laboratories, Inc. + * Copyright (c) 2011, Sagrad Inc. + * Copyright (c) 2010, ST-Ericsson + */ +#include +#include +#include +#include +#include +#include +#include + +#include "bus.h" +#include "wfx.h" +#include "hwio.h" +#include "main.h" +#include "bh.h" + +#define SET_WRITE 0x7FFF /* usage: and operation */ +#define SET_READ 0x8000 /* usage: or operation */ + +#define WFX_RESET_INVERTED 1 + +static const struct wfx_platform_data wfx_spi_pdata = { + .file_fw = "wfm_wf200", + .file_pds = "wf200.pds", + .use_rising_clk = true, +}; + +struct wfx_spi_priv { + struct spi_device *func; + struct wfx_dev *core; + struct gpio_desc *gpio_reset; + bool need_swab; +}; + +/* WFx chip read data 16bits at time and place them directly into (little + * endian) CPU register. So, chip expect byte order like "B1 B0 B3 B2" (while + * LE is "B0 B1 B2 B3" and BE is "B3 B2 B1 B0") + * + * A little endian host with bits_per_word == 16 should do the right job + * natively. The code below to support big endian host and commonly used SPI + * 8bits. + */ +static int wfx_spi_copy_from_io(void *priv, unsigned int addr, + void *dst, size_t count) +{ + struct wfx_spi_priv *bus = priv; + u16 regaddr = (addr << 12) | (count / 2) | SET_READ; + struct spi_message m; + struct spi_transfer t_addr = { + .tx_buf = ®addr, + .len = sizeof(regaddr), + }; + struct spi_transfer t_msg = { + .rx_buf = dst, + .len = count, + }; + u16 *dst16 = dst; + int ret, i; + + WARN(count % 2, "buffer size must be a multiple of 2"); + + cpu_to_le16s(®addr); + if (bus->need_swab) + swab16s(®addr); + + spi_message_init(&m); + spi_message_add_tail(&t_addr, &m); + spi_message_add_tail(&t_msg, &m); + ret = spi_sync(bus->func, &m); + + if (bus->need_swab && addr == WFX_REG_CONFIG) + for (i = 0; i < count / 2; i++) + swab16s(&dst16[i]); + return ret; +} + +static int wfx_spi_copy_to_io(void *priv, unsigned int addr, + const void *src, size_t count) +{ + struct wfx_spi_priv *bus = priv; + u16 regaddr = (addr << 12) | (count / 2); + /* FIXME: use a bounce buffer */ + u16 *src16 = (void *)src; + int ret, i; + struct spi_message m; + struct spi_transfer t_addr = { + .tx_buf = ®addr, + .len = sizeof(regaddr), + }; + struct spi_transfer t_msg = { + .tx_buf = src, + .len = count, + }; + + WARN(count % 2, "buffer size must be a multiple of 2"); + WARN(regaddr & SET_READ, "bad addr or size overflow"); + + cpu_to_le16s(®addr); + + /* Register address and CONFIG content always use 16bit big endian + * ("BADC" order) + */ + if (bus->need_swab) + swab16s(®addr); + if (bus->need_swab && addr == WFX_REG_CONFIG) + for (i = 0; i < count / 2; i++) + swab16s(&src16[i]); + + spi_message_init(&m); + spi_message_add_tail(&t_addr, &m); + spi_message_add_tail(&t_msg, &m); + ret = spi_sync(bus->func, &m); + + if (bus->need_swab && addr == WFX_REG_CONFIG) + for (i = 0; i < count / 2; i++) + swab16s(&src16[i]); + return ret; +} + +static void wfx_spi_lock(void *priv) +{ +} + +static void wfx_spi_unlock(void *priv) +{ +} + +static irqreturn_t wfx_spi_irq_handler(int irq, void *priv) +{ + struct wfx_spi_priv *bus = priv; + + wfx_bh_request_rx(bus->core); + return IRQ_HANDLED; +} + +static int wfx_spi_irq_subscribe(void *priv) +{ + struct wfx_spi_priv *bus = priv; + u32 flags; + + flags = irq_get_trigger_type(bus->func->irq); + if (!flags) + flags = IRQF_TRIGGER_HIGH; + flags |= IRQF_ONESHOT; + return devm_request_threaded_irq(&bus->func->dev, bus->func->irq, NULL, + wfx_spi_irq_handler, IRQF_ONESHOT, + "wfx", bus); +} + +static int wfx_spi_irq_unsubscribe(void *priv) +{ + struct wfx_spi_priv *bus = priv; + + devm_free_irq(&bus->func->dev, bus->func->irq, bus); + return 0; +} + +static size_t wfx_spi_align_size(void *priv, size_t size) +{ + /* Most of SPI controllers avoid DMA if buffer size is not 32bit aligned + */ + return ALIGN(size, 4); +} + +static const struct hwbus_ops wfx_spi_hwbus_ops = { + .copy_from_io = wfx_spi_copy_from_io, + .copy_to_io = wfx_spi_copy_to_io, + .irq_subscribe = wfx_spi_irq_subscribe, + .irq_unsubscribe = wfx_spi_irq_unsubscribe, + .lock = wfx_spi_lock, + .unlock = wfx_spi_unlock, + .align_size = wfx_spi_align_size, +}; + +static int wfx_spi_probe(struct spi_device *func) +{ + struct wfx_spi_priv *bus; + int ret; + + if (!func->bits_per_word) + func->bits_per_word = 16; + ret = spi_setup(func); + if (ret) + return ret; + /* Trace below is also displayed by spi_setup() if compiled with DEBUG */ + dev_dbg(&func->dev, "SPI params: CS=%d, mode=%d bits/word=%d speed=%d\n", + func->chip_select, func->mode, func->bits_per_word, + func->max_speed_hz); + if (func->bits_per_word != 16 && func->bits_per_word != 8) + dev_warn(&func->dev, "unusual bits/word value: %d\n", + func->bits_per_word); + if (func->max_speed_hz > 50000000) + dev_warn(&func->dev, "%dHz is a very high speed\n", + func->max_speed_hz); + + bus = devm_kzalloc(&func->dev, sizeof(*bus), GFP_KERNEL); + if (!bus) + return -ENOMEM; + bus->func = func; + if (func->bits_per_word == 8 || IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + bus->need_swab = true; + spi_set_drvdata(func, bus); + + bus->gpio_reset = devm_gpiod_get_optional(&func->dev, "reset", + GPIOD_OUT_LOW); + if (IS_ERR(bus->gpio_reset)) + return PTR_ERR(bus->gpio_reset); + if (!bus->gpio_reset) { + dev_warn(&func->dev, + "gpio reset is not defined, trying to load firmware anyway\n"); + } else { + gpiod_set_consumer_name(bus->gpio_reset, "wfx reset"); + if (spi_get_device_id(func)->driver_data & WFX_RESET_INVERTED) + gpiod_toggle_active_low(bus->gpio_reset); + gpiod_set_value_cansleep(bus->gpio_reset, 1); + usleep_range(100, 150); + gpiod_set_value_cansleep(bus->gpio_reset, 0); + usleep_range(2000, 2500); + } + + bus->core = wfx_init_common(&func->dev, &wfx_spi_pdata, + &wfx_spi_hwbus_ops, bus); + if (!bus->core) + return -EIO; + + return wfx_probe(bus->core); +} + +static int wfx_spi_remove(struct spi_device *func) +{ + struct wfx_spi_priv *bus = spi_get_drvdata(func); + + wfx_release(bus->core); + return 0; +} + +/* For dynamic driver binding, kernel does not use OF to match driver. It only + * use modalias and modalias is a copy of 'compatible' DT node with vendor + * stripped. + */ +static const struct spi_device_id wfx_spi_id[] = { + { "wfx-spi", WFX_RESET_INVERTED }, + { "wf200", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(spi, wfx_spi_id); + +#ifdef CONFIG_OF +static const struct of_device_id wfx_spi_of_match[] = { + { .compatible = "silabs,wfx-spi", .data = (void *)WFX_RESET_INVERTED }, + { .compatible = "silabs,wf200" }, + { }, +}; +MODULE_DEVICE_TABLE(of, wfx_spi_of_match); +#endif + +struct spi_driver wfx_spi_driver = { + .driver = { + .name = "wfx-spi", + .of_match_table = of_match_ptr(wfx_spi_of_match), + }, + .id_table = wfx_spi_id, + .probe = wfx_spi_probe, + .remove = wfx_spi_remove, +};