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Miller" , Jakub Kicinski , Aviad Brikman , Eliav Farber , Oleksandr Savchenko , Shay Bar , Viktor Barna Subject: [RFC v1 018/256] cl8k: add bus/pci/ipc.h Date: Thu, 17 Jun 2021 15:58:25 +0000 Message-Id: <20210617160223.160998-19-viktor.barna@celeno.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210617160223.160998-1-viktor.barna@celeno.com> References: <20210617160223.160998-1-viktor.barna@celeno.com> X-Originating-IP: [62.216.42.54] X-ClientProxiedBy: PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) To AM9P192MB1412.EURP192.PROD.OUTLOOK.COM (2603:10a6:20b:38b::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (62.216.42.54) by PR3PR09CA0018.eurprd09.prod.outlook.com (2603:10a6:102:b7::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.18 via Frontend Transport; Thu, 17 Jun 2021 16:02:53 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c88e060d-a13a-4692-701c-08d931a95d82 X-MS-TrafficTypeDiagnostic: AM0P192MB0499: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EdpuSOyB4cis81Na18i0dozBc9SnyGDWUNHluKAD7CT9I5rTSUu2JEeWKE2R/Qzmd1SPyVSapCBa1gFlwkdCX6UxZhJyRKkubhn3CIS9BpJDRia1LzLfUjDyYPtBxkyf8VKeWhSZp9LQgck/P/EhKmIPImXcpPaiuR7bx1aZUAwGa0NYl8x/Vv7SSg3TVGENCqN5rowbnVIpFnGycEU0CS9EUaVgcCxoZJ0cH5s9Q3oWL6ctbiDg2IJQ9f+VJnU/WAVscTTZFuSwO66CyWuxARmZ30LLZ80kPemQbPgtgWVbT6woCFP7yskgsDpwVbxGWoU93DgXr7LtVD3h2YEi/rZfALOHuDMQeKlyIGYV0NUQvgzuPpDyw7EL9g+x4vLRks6V9XdkKymYDDWWJci0Iv2w24LYecCFZB9xK5zhUbwOhsIfYdfLHh4clvDSG7P7nwhThh1/Y1iP/KvKJFTj0adE8oJVDSV5qFmVVxbpZo/jAfIYwhlZr277O0Fp8BQzBNxYliq4ffUevI4WXzgD5SL0Q1rX8+R0q31IxZ/EQspnCpCC8WLIaRmTJCD4IV5nQEw1AWYftMHoDSsvJ+78sMwFCamZ2IJNA9JFqTLu3matQ/umxfadbK1vZpHtf5Oa99vKB94F84JDkUMNAgT1JiXmI+NRLQW8CIhG6JaYPZIsorw4fApmDN3MK4JGPw/kOCPhYDVEG4PrJpqXxVop7Q== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM9P192MB1412.EURP192.PROD.OUTLOOK.COM; PTR:; CAT:NONE; SFS:(136003)(39840400004)(396003)(376002)(366004)(346002)(86362001)(107886003)(66556008)(52116002)(83380400001)(55236004)(36756003)(4326008)(186003)(16526019)(956004)(316002)(6486002)(8676002)(54906003)(38100700002)(38350700002)(66476007)(6506007)(2906002)(26005)(9686003)(6512007)(66946007)(2616005)(5660300002)(478600001)(1076003)(6666004)(8936002)(6916009)(69590400013)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +O/4z1JsRQx52JIzEPahvJ821do/oAiGwArA8qM/PClyb2FktV4Ak8gEiKgMQZF3gozjpMgX1WkwDmwrNbSINh87toDv+/F1LRShP5WnOr5NiTUmae4mR51W6oVyXeAqVEcdpulP56H1zsVk8Q1a8c9wUfEQRuZhBiyuUCILZHoEeadG6tNAFU6yGmz8HWKPM9zCHmC8yvp3y5y4/xpbrCT+WsiwjguFL6ZXvSd8Dx23iLuaT2tQP0oG4GpntBCEDZ86IEG7Dlg0JGHl0+Mcrcek0ja6++dax8burCbZFeYoUQd/N2RVwVNy1xOMSRwSBgpCS0is7YNeP86trQ+51RJsC6628iGU0rhI32EMj6Rj9KE9cxJQZ/zb5KuMp0bqQ+ravvnQqdLtgBRWK7r6MsIt4pRUcv7MPascWmq/UT6FmSYWJgVKWmS/aVKsd2Sga+zQhkPOEJsFu8HvsSOJGBAuTsHAiqbLx8Wh2mSxzE8PXsuxq4IotzdXil+0AgIZ3zAzsdK8Ya70F6/zEXiw49JGCo3uFAlZHmCXypdxgcUAIij+Wicj6yWDspR5BZon4gG8dXPtizgOcKyco2C3o8aUO3vzWDK6S/dy6EFmsfG0nTSmEBTKSmcO9iA03IvX8LSpIO7h6ZE0ggAM2r9uSvjQp/IHEvuT/FsfsFyQI6ew4qhkMXFlLpDOMgL3HBv9FUIY/YhI8txR7adDG6EVJBvMl67Mff9ehiGVxCF+l0dHQz4vNa6/nvA8ic65fhevny/ClFhEQQOxo7zrsijg5fHlEDmD2f5IvyvU8nfSLrjazFI7x9HZqQcn3TddnoMSqecZbR+tDDiHTh0z4NGP69uBYLssDDvhMCGrgRhUPsvDFt91lfbKsyf1C/9z1mEhHfPkhPMVyDeloHIxLh4vh7VtWbfEKRJl+zEogz73p728S05JUn4CuNo5fhTsbV5+zDdgxNvaE5hTev6POmSaYYb8Y0sbsgSJKW4ygcJ/hrkh2H9c+Ls5Fwa4FomUckGJoMgTkLM7lxNXgcHMIMMDYDmBlQB8r9feDrA5aHO2Z1BH9kcz3xQZ4do33pvBvIY6D8tQUJ6KY4vY7q2RjaUPafiUNmEdwdqMB/XxKSyAxP31sL7464VUZdOgdHhyCOj+PbHFQ4yTOpZzhUGPrI8u+OujHiqqe2+apmxKY6P3zgIgd5+CD0vDypFj+TqcsCDsfWlAUBO/xMmhXZlZ4SfIvvjOJXA+LF1ZGKN5VSEvk3rKaMnBKf7iGG22yQeHAwWytGC86l7VCnM/uqsBCKPLPfavJzZCBQ1VefrPaQX42GeeeX/Lbf9CDqlBOTD8bvJU X-OriginatorOrg: celeno.com X-MS-Exchange-CrossTenant-Network-Message-Id: c88e060d-a13a-4692-701c-08d931a95d82 X-MS-Exchange-CrossTenant-AuthSource: AM9P192MB1412.EURP192.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2021 16:02:53.9143 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f313103b-4c9f-4fd3-b5cf-b97f91c4afa8 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: laXFlaGMi4FBIA2HoWjAid6UDtUSTYH27IuP4ofKTTONGLuqp+jlJY6cX3d56xf5PtZvxO9hH1g5ZQuq8SaOUQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0P192MB0499 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org From: Viktor Barna (Part of the split. Please, take a look at the cover letter for more details). Signed-off-by: Viktor Barna --- .../net/wireless/celeno/cl8k/bus/pci/ipc.h | 135 ++++++++++++++++++ 1 file changed, 135 insertions(+) create mode 100644 drivers/net/wireless/celeno/cl8k/bus/pci/ipc.h -- 2.30.0 diff --git a/drivers/net/wireless/celeno/cl8k/bus/pci/ipc.h b/drivers/net/wireless/celeno/cl8k/bus/pci/ipc.h new file mode 100644 index 000000000000..81cdae55f467 --- /dev/null +++ b/drivers/net/wireless/celeno/cl8k/bus/pci/ipc.h @@ -0,0 +1,135 @@ +/* SPDX-License-Identifier: MIT */ +/* Copyright(c) 2019-2021, Celeno Communications Ltd. */ + +#ifndef CL_IPC_H +#define CL_IPC_H + +#include "ipc_shared.h" +#include "hw.h" + +/* Struct used to store information about host buffers (DMA Address and local pointer) */ +struct cl_ipc_hostbuf { + ptrdiff_t hostid; /* Ptr to hostbuf client (ipc_host client) structure */ + dma_addr_t dma_addr; /* Ptr to real hostbuf dma address */ +}; + +/* + * Index in txdesc - updated by host on every push, used by firmware side + * Keep this structure aligned to 4-byte + */ +struct cl_ipc_txdesc_write_idx { + u32 agg[IPC_MAX_BA_SESSIONS]; + u32 single[MAX_SINGLE_QUEUES]; + u32 bcmc; +}; + +struct cl_ipc_ring_indices { + /* Last copy of ipc txdesc write desc right after DMA push operation */ + volatile struct cl_ipc_txdesc_write_idx txdesc_write_idx; + /* + * new start sn - equal to last acknowledged sequence number + 1. + * Updated by firmware and used by host. + */ + volatile u16 new_ssn_idx[IPC_MAX_BA_SESSIONS]; + volatile u8 dtim_count[MAX_BSS_NUM]; + /* Index in rxdesc array, updated by firmware on every payload push, used by host */ + volatile u32 rxdesc_write_idx[CL_RX_BUF_MAX]; + /* Index in rxdesc array, updated by host on rxdesc copy completion, used by firmware */ + volatile u32 rxdesc_read_idx[CL_RX_BUF_MAX]; + /* BSR data counters */ + volatile u32 bsr_data_ctrs[TID_MAX]; +}; + +/* Structure used to store Shared Txring indices */ +struct cl_ipc_ring_indices_elem { + struct cl_ipc_ring_indices *indices; + dma_addr_t dma_addr; +}; + +struct cl_ipc_host_rxbuf { + /* Array of drv desc which holds the skb and additional data */ + ptrdiff_t **ipc_host_rxdesc_ptr; + /* Address of payload for embedded push operation (part of rxdesc data) */ + u32 *dma_payload_addr; + /* Dma pointer to array of DMA payload addresses */ + __le32 dma_payload_base_addr; +}; + +/* + * struct tx_queues_dma_addr - ipc layer queues addresses casted to DMA addresses + * + * The ipc layer points to array of txdesc, there are: + * 'IPC_MAX_BA_SESSIONS' arrays for aggregation queues + * 'MAX_SINGLE_QUEUES' arrayes for singletons queues + * '1' arrays for broadcast/unicast queue + * + * Each one of this arrays should be copied compeletly to the FW, therefore we should + * cast all of the arrays to dma addresses. + */ +struct tx_queues_dma_addr { + u32 agg[IPC_MAX_BA_SESSIONS]; + u32 single[MAX_SINGLE_QUEUES]; + u32 bcmc; +}; + +/* struct cl_ipc_tx_queues - ipc layer tx queues */ +struct cl_ipc_tx_queues { + struct txdesc *ipc_txdesc_agg[IPC_MAX_BA_SESSIONS]; + struct txdesc *ipc_txdesc_single[MAX_SINGLE_QUEUES]; + struct txdesc *ipc_txdesc_bcmc; + /* Mapping of the TXQ's addresses to DMA addresses */ + struct tx_queues_dma_addr *queues_dma_addr; + /* DMA address of tx_queues_dma_addr */ + u32 dma_addr; +}; + +struct cl_ipc_host_env { + /* Pointer to the shared environment */ + struct cl_ipc_shared_env *shared; + /* TX ring indices (RD, WR idx & new_ssn) */ + struct cl_ipc_ring_indices_elem *ring_indices_elem; + /* RX buffers (rxdesc & dma_addr) */ + ptrdiff_t *ipc_host_rxdesc_rxm[IPC_RXBUF_CNT_RXM]; + ptrdiff_t *ipc_host_rxdesc_fw[IPC_RXBUF_CNT_FW]; + struct cl_ipc_host_rxbuf rx_hostbuf_array[CL_RX_BUF_MAX]; + /* Host last read idx */ + u32 host_rxdesc_read_idx[CL_RX_BUF_MAX]; + /* Fields for Radar events handling */ + struct cl_ipc_hostbuf radar_hostbuf_array[IPC_RADAR_BUF_CNT]; + u8 radar_host_idx; + /* Fields for Emb->App MSGs handling */ + struct cl_ipc_hostbuf e2a_msg_hostbuf_array[IPC_E2A_MSG_BUF_CNT]; + u8 e2a_msg_host_idx; + /* Fields for Debug MSGs handling */ + struct cl_ipc_hostbuf dbg_hostbuf_array[IPC_DBG_BUF_CNT]; + u8 dbg_host_idx; + /* IPC queues */ + struct cl_ipc_tx_queues tx_queues; + struct cl_ipc_enhanced_tim enhanced_tim; + /* Fields for single confirmation handling */ + u8 *cfm_virt_base_addr; + dma_addr_t cfm_dma_base_addr; + /* Index used that points to the first used CFM */ + u32 cfm_used_idx; + /* Tasklets */ + struct tasklet_struct rxdesc_tasklet; + struct tasklet_struct tx_single_cfm_tasklet; + struct tasklet_struct tx_agg_cfm_tasklet; + struct tasklet_struct msg_tasklet; + struct tasklet_struct dbg_tasklet; +}; + +int cl_ipc_init(struct cl_hw *cl_hw); +void cl_ipc_recovery(struct cl_hw *cl_hw); +void cl_ipc_reset(struct cl_hw *cl_hw); +void cl_ipc_deinit(struct cl_hw *cl_hw); +void cl_ipc_stop(struct cl_hw *cl_hw); +int cl_ipc_rx_elem_alloc(struct cl_hw *cl_hw, struct cl_rx_elem *rx_elem, u32 size); +void cl_ipc_msgbuf_push(struct cl_ipc_host_env *ipc_env, ptrdiff_t hostid, dma_addr_t hostbuf); +void cl_ipc_rxbuf_push(struct cl_ipc_host_env *ipc_env, struct cl_rx_elem *rx_elem, + u32 rxdesc_read_idx, u32 host_read_idx, enum rx_buf_type type); +void cl_ipc_radarbuf_push(struct cl_ipc_host_env *ipc_env, ptrdiff_t hostid, dma_addr_t hostbuf); +void cl_ipc_dbgbuf_push(struct cl_ipc_host_env *ipc_env, ptrdiff_t hostid, dma_addr_t hostbuf); +void cl_ipc_dbginfobuf_push(struct cl_ipc_host_env *ipc_env, dma_addr_t infobuf); + +#endif /* CL_IPC_H */