@@ -2490,6 +2490,7 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy)
cnt = mt76_rr(dev, MT_MIB_SDR4(phy->band_idx));
mib->rx_fifo_full_cnt += FIELD_GET(MT_MIB_SDR4_RX_FIFO_FULL_MASK, cnt);
+ mib->rx_oor_cnt += FIELD_GET(MT_MIB_SDR4_RX_OOR_MASK, cnt);
cnt = mt76_rr(dev, MT_MIB_SDR5(phy->band_idx));
mib->rx_mpdu_cnt += cnt;
@@ -1148,6 +1148,7 @@ static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = {
/* rx counters */
"rx_fifo_full_cnt",
+ "rx_oor_cnt", /* rx ppdu length is bad */
"rx_mpdu_cnt",
"channel_idle_cnt",
"rx_vector_mismatch_cnt",
@@ -1331,7 +1332,8 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw,
data[ei++] = mib->tx_amsdu[i];
/* rx counters */
- data[ei++] = mib->rx_fifo_full_cnt;
+ data[ei++] = mib->rx_fifo_full_cnt; /* group-5 might exacerbate this */
+ data[ei++] = mib->rx_oor_cnt;
data[ei++] = mib->rx_mpdu_cnt;
data[ei++] = mib->channel_idle_cnt;
data[ei++] = mib->rx_vector_mismatch_cnt;
@@ -208,6 +208,7 @@ struct mib_stats {
/* rx stats */
u32 rx_fifo_full_cnt;
+ u32 rx_oor_cnt;
u32 channel_idle_cnt;
u32 rx_vector_mismatch_cnt;
u32 rx_delimiter_fail_cnt;
@@ -292,6 +292,7 @@ enum offs_rev {
#define MT_MIB_SDR4(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR4))
#define MT_MIB_SDR4_RX_FIFO_FULL_MASK GENMASK(15, 0)
+#define MT_MIB_SDR4_RX_OOR_MASK GENMASK(23, 16)
/* rx mpdu counter, full 32 bits */
#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR5))