From patchwork Mon Oct 31 16:39:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shayne Chen X-Patchwork-Id: 621727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE72DFA3743 for ; Mon, 31 Oct 2022 16:40:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231944AbiJaQkb (ORCPT ); Mon, 31 Oct 2022 12:40:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231927AbiJaQk1 (ORCPT ); Mon, 31 Oct 2022 12:40:27 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F10B2BF3 for ; Mon, 31 Oct 2022 09:40:19 -0700 (PDT) X-UUID: 8a448a2d3098460096db7af389e1317f-20221101 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=t7U3K5BetsMaXVC+c3t7ld6KY1jelscWxbnMwrO5o6g=; b=gUiC40M92GC50SdI7Sxm0W03/LspmoVU7OXYU3QACfZqWRsCZsWI/vmzdp2eXYhCMUWmzalcsCwG1uNrJKGkwF1F7srVJFMoPXt2R1zXxpQuILFlS5EjPaqJ+h2E9Pyq+l8Tff7/eyQiVF7QX7BIhPZGvxERoRaJpzxMS5N3igI=; X-CID-UNFAMILIAR: 1 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12, REQID:5c9b1547-0717-4b61-b4c4-37b8f08a439e, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:100 X-CID-INFO: VERSION:1.1.12, REQID:5c9b1547-0717-4b61-b4c4-37b8f08a439e, IP:0, URL :0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:100 X-CID-META: VersionHash:62cd327, CLOUDID:dda2fcea-84ac-4628-a416-bc50d5503da6, B ulkID:2211010040147SLPYML6,BulkQuantity:0,Recheck:0,SF:28|16|19|48,TC:nil, Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 8a448a2d3098460096db7af389e1317f-20221101 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 874636835; Tue, 01 Nov 2022 00:40:12 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 1 Nov 2022 00:40:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 1 Nov 2022 00:40:12 +0800 From: Shayne Chen To: Felix Fietkau CC: linux-wireless , Lorenzo Bianconi , Ryder Lee , Evelyn Tsai , Bo Jiao , linux-mediatek , Shayne Chen , Peter Chiu Subject: [PATCH 06/10] wifi: mt76: connac: introduce unified event table Date: Tue, 1 Nov 2022 00:39:56 +0800 Message-ID: <20221031164000.17063-7-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221031164000.17063-1-shayne.chen@mediatek.com> References: <20221031164000.17063-1-shayne.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Add event IDs and related bit fields for unified event support. This is a preliminary patch to add mt7996 chipset support. Signed-off-by: Bo Jiao Signed-off-by: Peter Chiu Signed-off-by: Shayne Chen --- drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h index 7f97d4b70e95..909b2ba67c11 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h @@ -993,6 +993,17 @@ enum { MCU_EXT_EVENT_MURU_CTRL = 0x9f, }; +/* unified event table */ +enum { + MCU_UNI_EVENT_RESULT = 0x01, + MCU_UNI_EVENT_FW_LOG_2_HOST = 0x04, + MCU_UNI_EVENT_IE_COUNTDOWN = 0x09, + MCU_UNI_EVENT_RDD_REPORT = 0x11, +}; + +#define MCU_UNI_CMD_EVENT BIT(1) +#define MCU_UNI_CMD_UNSOLICITED_EVENT BIT(2) + enum { MCU_Q_QUERY, MCU_Q_SET,