From patchwork Thu Aug 30 16:15:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 145551 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp92415ljw; Thu, 30 Aug 2018 09:16:46 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZ/WCfa75hPyWn2IWyaOweMu3rc7fLOCyytu04C4rXkln4TM6BLyIWZrfhEcaEYhHs+an5f X-Received: by 2002:a17:902:2804:: with SMTP id e4-v6mr10766413plb.327.1535645805952; Thu, 30 Aug 2018 09:16:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535645805; cv=none; d=google.com; s=arc-20160816; b=BdGfvWS2Ra7+MHAjdYRXLXQR0p6gqBm2fza26qSigOuLkwObq/W9fGyXA3ogy6Qpb2 MZgTK/a67yy0a+grKE/JpxuEru+hwcihhzF5N0//HlEkZ6brDrOQBp2fnmMHhFElAVEX qQjDPzaKYil+VhyXydOgcMzavcTsto41Y3VD7Lus45mhxFGF60Z0Ps8YXj8nlxV9Q1e3 4AoZpsZ9GzGASNzv+CPMWLbGcH81FFLXqijMiZpd7eOS9iZ/21eDrYSekXrU/P3yntKP izZLfgtHeY55ECC/RpkQJwVI48W/bFnupKLW17ZgvPvTaXH2hbF7hY4kJhvI7oDz91gE FRFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=uRkXqpGsPXuuOPLdcuj+Pz97MAk3a0w7lHcv73i5dho=; b=luD/zKPCi21VumRR6znQVo8tzCHfuqTfZnQJNvhFH0WoGRwLxmReOLMLDa9Wvp7e7z mJ9Y/U3KSe4mrQ07R+OZfDJ5xdZn/VmHMaTu3IZWeqdFU4bbAaS+bfGhlM5zj1zkumnM FbiVhVgtR3KobzeUEvh3Cq2CkFce3Gwy52G1y6OnY57OIsH2StZdQyjtPTMlUCKK0hKz eDzmq0yfOeSIeKARgGuEkKdfgcuui28GHhP2vKIiGndiQy6Bn8So9ncsW+uT2VGcq8gH E5UnRVhNL8XDnMh1JjYr+vB3yfROKGkcNNfjqTJCQkuNGBHSN+skMHjRLUEFU1p7P85S Ju3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 22-v6si7124203pfl.220.2018.08.30.09.16.45; Thu, 30 Aug 2018 09:16:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727531AbeH3USm (ORCPT + 32 others); Thu, 30 Aug 2018 16:18:42 -0400 Received: from foss.arm.com ([217.140.101.70]:44780 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725836AbeH3USl (ORCPT ); Thu, 30 Aug 2018 16:18:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F41E718A; Thu, 30 Aug 2018 09:15:48 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C482D3F557; Thu, 30 Aug 2018 09:15:48 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 0DC661AE3614; Thu, 30 Aug 2018 17:16:01 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, benh@au1.ibm.com, torvalds@linux-foundation.org, npiggin@gmail.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, Will Deacon Subject: [PATCH 00/12] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Date: Thu, 30 Aug 2018 17:15:34 +0100 Message-Id: <1535645747-9823-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello again, This is v1 of the RFC I previously posted here: http://lists.infradead.org/pipermail/linux-arm-kernel/2018-August/597821.html The main changes include: * Rewrite the comment in tlbflush.h to explain the various functions and justify the barrier semantics * Fix the "flush entire ASID" heuristic to work with !4K page sizes * Fixed the build on sh (well, it fails somewhere else that isn't my fault) * Report PxD_SHIFT instead of PxD_SIZE via tlb_get_unmap_shift() It's also had a lot more testing, but has held up nicely so far on arm64. I haven't figured out how to merge this yet, but I'll probably end up pulling the core changes out onto a separate branch. Cheers, Will --->8 Peter Zijlstra (1): asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather Will Deacon (11): arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() arm64: tlbflush: Allow stride to be specified for __flush_tlb_range() arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code asm-generic/tlb: Guard with #ifdef CONFIG_MMU asm-generic/tlb: Track which levels of the page tables have been cleared arm64: tlb: Adjust stride and type of TLBI according to mmu_gather arm64: tlb: Avoid synchronous TLBIs when freeing page tables arm64: tlb: Rewrite stale comment in asm/tlbflush.h arch/arm64/Kconfig | 1 + arch/arm64/include/asm/pgtable.h | 10 +++- arch/arm64/include/asm/tlb.h | 34 +++++------- arch/arm64/include/asm/tlbflush.h | 112 ++++++++++++++++++++++++-------------- include/asm-generic/tlb.h | 85 +++++++++++++++++++++++++---- mm/memory.c | 4 +- 6 files changed, 168 insertions(+), 78 deletions(-) -- 2.1.4 Acked-by: Peter Zijlstra (Intel)