From patchwork Tue Nov 27 19:45:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 152159 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp188899ljp; Tue, 27 Nov 2018 11:44:48 -0800 (PST) X-Google-Smtp-Source: AJdET5eqtDd6+U4d3gs+y9wUGzlx8tnTcoWsrDmYL29Mk1kvYAdhsJ0bMCQv+FEp6ZUXUOsLrIp7 X-Received: by 2002:a62:4549:: with SMTP id s70mr33823185pfa.233.1543347888194; Tue, 27 Nov 2018 11:44:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543347888; cv=none; d=google.com; s=arc-20160816; b=djdiCua3z8V7K0cbo+WeRa69f4W093EY7V0usiP7pU6ZLi6u6+tsrEuKgN7T92CpA7 bVyGRLtrtYz/uQKWyZqy++RsUriwbCv/l184NZr3RMrJaUlbVEWp6/CS7krMDUBshMKC 3Xz8d6580ypecHnG+8pOQT9do509tVBInPEB6yyclpL+0e0Vt92OXkl7lH447cxwDj2l a3bnxrxyK1QrwSgoLzj4BuMSD07LUUvALfNHtaCmREGbT1lPKPrM/CUvna/Je9sjdMFT 07U8PNn0grqjoaJq2Eux52Jv8HG1HXHN1tm2leu9C7AUKoJj1taAxEUnBQIIxjvQnl8u +lNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=KOtiuY3W/l88cFHkPDfKaq6zhJw0PzldJPHebnlc/6c=; b=B3TSYeNOOsgKbvwNOqUlVQb9du6mPxApsbMi7/O6hn/IFWPpk8Zue40TQDoMiEf1OI Hw+zxEWnSbw29DB8zcRnPwjSWhgQ6zhrmNehSRJXaMUpEt/C/BK/952Ksn/Xpw9BAjKG jf/WFKLt+dSiZ+rvm9nm/EVoer7b4WdOBTcvWqGyF5eTSTZI9trkInxiFjYYVFeSpI20 iOYtasHmocdcAJUfZwR8z+GnQmGyfd0fYKXFjDnFfiNGCbZhSPcrS8aPPuWiXe9dre8r nzTsbCeQ9p4inJReMz/A5yURHsft1gfHnbMd8DTWlwyERrue4RUEfMI55WUxr65ZzF1u vK0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 37si4242160pgw.590.2018.11.27.11.44.47; Tue, 27 Nov 2018 11:44:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726399AbeK1Gnn (ORCPT + 32 others); Wed, 28 Nov 2018 01:43:43 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:46930 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725752AbeK1Gnn (ORCPT ); Wed, 28 Nov 2018 01:43:43 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 12B8336B4; Tue, 27 Nov 2018 11:44:45 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D6BAB3F575; Tue, 27 Nov 2018 11:44:44 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id B72101AE0A0D; Tue, 27 Nov 2018 19:45:02 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, ard.biesheuvel@linaro.org, catalin.marinas@arm.com, rml@tech9.net, tglx@linutronix.de, peterz@infradead.org, schwidefsky@de.ibm.com, Will Deacon Subject: [PATCH 0/2] arm64: Only call into preempt_schedule() if need_resched() Date: Tue, 27 Nov 2018 19:45:00 +0000 Message-Id: <1543347902-21170-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi all, This pair of patches improves our preempt_enable() implementation slightly on arm64 by making the resulting call to preempt_schedule() conditional on need_resched(), which is tracked in bit 32 of the preempt count. The logic is inverted so that we can detect the preempt count going to zero and need_resched being set with a single CBZ instruction. Consequently, our preempt_enable() code (including prologue/epilogue) goes from: 40: a9bf7bfd stp x29, x30, [sp, #-16]! 44: 910003fd mov x29, sp 48: d5384101 mrs x1, sp_el0 4c: b9401020 ldr w0, [x1, #16] 50: 51000400 sub w0, w0, #0x1 54: b9001020 str w0, [x1, #16] 58: 350000a0 cbnz w0, 6c 5c: f9400020 ldr x0, [x1] 60: 721f001f tst w0, #0x2 64: 54000040 b.eq 6c // b.none 68: 94000000 bl 0 6c: a8c17bfd ldp x29, x30, [sp], #16 70: d65f03c0 ret to: 40: a9bf7bfd stp x29, x30, [sp, #-16]! 44: 910003fd mov x29, sp 48: d5384101 mrs x1, sp_el0 4c: f9400820 ldr x0, [x1, #16] 50: d1000400 sub x0, x0, #0x1 54: b9001020 str w0, [x1, #16] 58: b4000060 cbz x0, 64 5c: a8c17bfd ldp x29, x30, [sp], #16 60: d65f03c0 ret 64: 94000000 bl 0 68: a8c17bfd ldp x29, x30, [sp], #16 6c: d65f03c0 ret Will --->8 Will Deacon (2): preempt: Move PREEMPT_NEED_RESCHED definition into arch code arm64: preempt: Provide our own implementation of asm/preempt.h arch/arm64/include/asm/Kbuild | 1 - arch/arm64/include/asm/preempt.h | 78 ++++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/thread_info.h | 13 +++++- arch/s390/include/asm/preempt.h | 2 + arch/x86/include/asm/preempt.h | 3 ++ include/linux/preempt.h | 3 -- 6 files changed, 95 insertions(+), 5 deletions(-) create mode 100644 arch/arm64/include/asm/preempt.h -- 2.1.4