From patchwork Mon Nov 4 16:51:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 178440 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1734115ilf; Mon, 4 Nov 2019 08:55:00 -0800 (PST) X-Google-Smtp-Source: APXvYqy9DjH9ADjXBI3qoxFIvQJBNKAnmVSzrXrHx4LMoH+A9QcTA91PNJYDe/lwVr43WFiqQ9+X X-Received: by 2002:a17:906:e0d5:: with SMTP id gl21mr9256866ejb.292.1572886500648; Mon, 04 Nov 2019 08:55:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572886500; cv=none; d=google.com; s=arc-20160816; b=z7tF/a3d6NeVzwO1myMax+KY/y5mOyr7taCY1VCUBDo2RL3ewZlrzqGV1x/uS9BLT/ 3OLAwCUJcPEoyVelTzbW4+PP2TQoTRyvLruoJK54wlY4dWFy8b/+pLgu17s39yvu7l+C QZyyw+opYvQYhswba8tXDp7/nLeCHx+9IIN/KHNtYJYJ0f+/O1325JMoTlNg7f40aag7 cyRTuZZsjm3k+DPcLuhXn9itSL2TVXrEkbgG3vr/X4sYE4m91TB34Ek44Rg/Vu3F8qrP 1r5zL4gcVQvPzmGA0ShUXDRvz+r1gs/tD3rs+o1hcrthbeVyFthgqrTvIe3J9hOs8wcA NZSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=t9FCDq+jxXtpdX0TTc4M5wpbpxDKPtn3SWL+S/0g2Vc=; b=KYPaMPMdRvGs7yExadhbwaczVBuBmA9P2W9+M+LtV6wPbScnJzs10LwGK0WASsKRE2 Ak36gXcpDb2fcIP3RvJ6ger0o/C0Ssrvn0dQsB601sBk6Hwznaje1iPHg8xzNPF4v/+7 FxRQGL9pVhLsWqCBO/o8LXulWDEV2L2uiGAkdTgsZfUgjxQ9wTn7V9oAnFlHsoN8pPFg 1J3n3oeEgFaDRndAMhBO5cO00ITgfGUPlNUdzJLVY4nIMgZK/C6WA1SkZiiFPr+3+zp5 ULZejg62p5/hUmRwc+s2+Aow9NCy3WBzfLJeqG7xm6NVqr601gvacIHuOLih4bpl5Knk DZpg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s19si11290878ejr.279.2019.11.04.08.55.00; Mon, 04 Nov 2019 08:55:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729379AbfKDQy6 (ORCPT + 26 others); Mon, 4 Nov 2019 11:54:58 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:45770 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727861AbfKDQy4 (ORCPT ); Mon, 4 Nov 2019 11:54:56 -0500 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 2F009202F7ED87065250; Tue, 5 Nov 2019 00:54:52 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.439.0; Tue, 5 Nov 2019 00:54:42 +0800 From: John Garry To: , , CC: , , , , , , John Garry Subject: [PATCH 0/3] HiSilicon v3xx SFC driver Date: Tue, 5 Nov 2019 00:51:34 +0800 Message-ID: <1572886297-45400-1-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset introduces support for the HiSilicon SFC V3XX driver. Whilst the kernel tree already includes support for a "HiSilicon SFC driver", that is for different HW. Indeed, as mentioned in patch #1, the naming for that driver could be better, as it should support more memory technologies than SPI NOR (as I have been told), and it is actually known internally as FMC. As such, maybe "hisi-fmc" would have been better, but we can't change that now. I used V3XX in this driver name, as that is the unique versioning for this HW. As for the driver itself, it is quite simple. Only ACPI firmware is supported, and we assume m25p80 compatible SPI NOR part will be used. DMA is not supported, and we just use polling mode for operation completion notification. The driver uses the SPI MEM OPs. Tested against 5.4-rc4. John Garry (3): mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are spi: Add HiSilicon v3xx SPI NOR flash controller driver MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver MAINTAINERS | 6 + drivers/mtd/spi-nor/Kconfig | 4 +- drivers/mtd/spi-nor/hisi-sfc.c | 2 +- drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/spi-hisi-sfc-v3xx.c | 287 ++++++++++++++++++++++++++++++++ 6 files changed, 306 insertions(+), 3 deletions(-) create mode 100644 drivers/spi/spi-hisi-sfc-v3xx.c -- 2.17.1