From patchwork Tue Nov 19 02:19:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 179622 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2617ilf; Mon, 18 Nov 2019 18:19:30 -0800 (PST) X-Google-Smtp-Source: APXvYqzSU/RyliMNweJYMd+EziOrIMwHgQAGNyxs4Q9VBdPigSvsJCZ3yKq9tGa18yE8lToxtMoM X-Received: by 2002:a17:906:948a:: with SMTP id t10mr31234912ejx.110.1574129970383; Mon, 18 Nov 2019 18:19:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574129970; cv=none; d=google.com; s=arc-20160816; b=hx7gPJoK5APnz4ktNVtdrqVcQz2S2nnS0rv7GneBHx/AAXKsy9c33PaD88yUFYsDl2 A3zFxN/ofr9wq9nXZLAAQUSsgE0rXb4aBXZHrGdkGVFO8JdqwRctTodZ97ZQ1ajdxctN ZUMKcZ88m48QzWllV5Mg8IqETcOlTI9xUKCROPB3rX6VDgm+OEmBuHiDKd0Y39BR9NEj 6u2nHmO2vTDq7tj0eDH7wvl2x94IL70UNQ0tcyU/DLgo0rcDMecajPIS2/+ZxSkHRy7x nnTUQ+m8RWfGoohyu0vdI+xFJO2meeNCWrJfDGzY88BDMsbNgN+/ehQiYI7sa+k+FGtJ CVrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=e4aIgyWA8nd6bYR8bkYMzYL08Aka08xlC7bjxdTsghI=; b=Dq1igaFhJ6/0nrysP8im9h800CxroHDw1N8RdWk72Kobn7RoGWnxW7fBeALmN/F0u8 MvlZShk3Ww8kUeUWviHfiOXgohu8ulpis1b9dCE8lxc6RvEC1En1eE6xPY9u5hw5maC3 H4sw6WPwJMjfTH2Al9dsSCglOpM7gansx7bIbmtP2JQtk4AxJTBkE9KHxH9R5UaavlOB V8bG4f0fGe8K5VDjDMfR/IRBD3WFlF6HqDZzOXO9hLxDnyOwbZ4ZzyLuF5fcsC4SSeAt oUiQ9/zjTROLn2H4GYYC4ZmLEfWNB9LPA6uOVb8NKH9YarxZzMuYdVthoDlBLxEb4epM 0NWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si12630863ejc.315.2019.11.18.18.19.30; Mon, 18 Nov 2019 18:19:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727321AbfKSCTZ (ORCPT + 26 others); Mon, 18 Nov 2019 21:19:25 -0500 Received: from mx2.suse.de ([195.135.220.15]:57968 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726952AbfKSCTY (ORCPT ); Mon, 18 Nov 2019 21:19:24 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 5C2BAAC6F; Tue, 19 Nov 2019 02:19:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Thomas Gleixner , Jason Cooper , Marc Zyngier , devicetree@vger.kernel.org, Andrew Lunn , Aleix Roca Nonell , James Tai Subject: [PATCH v4 0/8] ARM: Realtek RTD1195/RTD1295/RTD1395 IRQ mux Date: Tue, 19 Nov 2019 03:19:09 +0100 Message-Id: <20191119021917.15917-1-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This series adds two IRQ muxes for the Realtek RTD1195, RTD1295 and RTD1395 SoC families. The implementation is based on register offsets seen in the vendor DT, split up into two separate nodes, as well as code from QNAP's rtk119x and Synology's RTD1293/96 GPL code dumps. v3 does various cleanups, renames variables, reworks unmask vs. enable/disable and adds an isr/scpu_int_en map as well as full RTD1195 support. More experimental patches at: https://github.com/afaerber/linux/commits/rtd1295-next Have a lot of fun! Cheers, Andreas v3 -> v4: * Drop no-op .irq_set_affinity callback (Thomas) * Clear all interrupts (James) * Updated SPDX-License-identifier * Use tabular formatting (Thomas) * Adopt different braces style (Thomas) * Use raw_spinlock_t (Thomas) * Shortened callback name (Thomas) * Fixed of_iomap() error handling * Don't mask unmapped NMIs * Cache SCPU_INT_EN (Thomas) * Renamed binding and source files * Dropped UART1/UART2 TO interrupts * Expanded commit messages * Added RTD1395 patches v2 -> v3: * Rebased, adding nodes to rtd129x.dtsi instead of rtd1295.dtsi * Adopted {readl,writel}_relaxed() (Marc) * Adopted spin_lock_irqsave() (Marc) * Implemented RTD1195 * Implemented mapping for non-linear bits such as i2c3 v1 -> v2: * Rebased, avoiding dependency on reset series for DT nodes * Don't forward set_affinity to GIC (Marc) * Added more spinlocks (Marc) * Code cleanups * Investigated quirk * Fixed spinlock initialization (Andrew) Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: devicetree@vger.kernel.org Cc: Andrew Lunn Cc: Aleix Roca Nonell Cc: James Tai Andreas Färber (8): dt-bindings: interrupt-controller: Add Realtek RTD1195/RTD1295 mux irqchip: Add Realtek RTD1295 mux driver arm64: dts: realtek: rtd129x: Add irq muxes and UART interrupts irqchip: rtd1195-mux: Add RTD1195 definitions ARM: dts: rtd1195: Add irq muxes and UART interrupts dt-bindings: interrupt-controller: rtd1195-mux: Add RTD1395 irqchip: rtd1195-mux: Add RTD1395 definitions arm64: dts: realtek: rtd139x: Add irq muxes and UART interrupts .../interrupt-controller/realtek,rtd1195-mux.yaml | 55 +++ arch/arm/boot/dts/rtd1195.dtsi | 20 + arch/arm64/boot/dts/realtek/rtd129x.dtsi | 22 + arch/arm64/boot/dts/realtek/rtd139x.dtsi | 22 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rtd1195-mux.c | 463 +++++++++++++++++++++ 6 files changed, 583 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/realtek,rtd1195-mux.yaml create mode 100644 drivers/irqchip/irq-rtd1195-mux.c -- 2.16.4