From patchwork Wed Aug 10 12:17:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 3354 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 43D32241D9 for ; Wed, 10 Aug 2011 12:17:42 +0000 (UTC) Received: from mail-qy0-f180.google.com (mail-qy0-f180.google.com [209.85.216.180]) by fiordland.canonical.com (Postfix) with ESMTP id F24D5A1834E for ; Wed, 10 Aug 2011 12:17:41 +0000 (UTC) Received: by mail-qy0-f180.google.com with SMTP id 31so688434qyk.11 for ; Wed, 10 Aug 2011 05:17:41 -0700 (PDT) Received: by 10.229.183.84 with SMTP id cf20mr6218000qcb.121.1312978661571; Wed, 10 Aug 2011 05:17:41 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.229.190.71 with SMTP id dh7cs78442qcb; Wed, 10 Aug 2011 05:17:41 -0700 (PDT) Received: from mr.google.com ([10.14.14.7]) by 10.14.14.7 with SMTP id c7mr1785806eec.151.1312978661234 (num_hops = 1); Wed, 10 Aug 2011 05:17:41 -0700 (PDT) Received: by 10.14.14.7 with SMTP id c7mr1290694eec.151.1312978660635; Wed, 10 Aug 2011 05:17:40 -0700 (PDT) Received: from eu1sys200aog114.obsmtp.com (eu1sys200aog114.obsmtp.com [207.126.144.137]) by mx.google.com with SMTP id c43si617058eei.41.2011.08.10.05.17.32 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 10 Aug 2011 05:17:40 -0700 (PDT) Received-SPF: neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.137; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.137 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-us.st.com ([167.4.1.35]) (using TLSv1) by eu1sys200aob114.postini.com ([207.126.147.11]) with SMTP ID DSNKTkJ22yrjqeMico6IGoUNp+17W+sEX30Y@postini.com; Wed, 10 Aug 2011 12:17:40 UTC Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id ABD0C4D; Wed, 10 Aug 2011 12:17:30 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id 1507971; Wed, 10 Aug 2011 12:17:30 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 9F669A807B; Wed, 10 Aug 2011 14:17:24 +0200 (CEST) Received: from localhost.localdomain (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 10 Aug 2011 14:17:29 +0200 From: Linus Walleij To: Grant Likely , , Cc: Lee Jones , Linus Walleij , Sekhar Nori , Kevin Hilman Subject: [PATCH 09/19] mach-davinci: break out GPIO driver specifics Date: Wed, 10 Aug 2011 14:17:27 +0200 Message-ID: <1312978647-18372-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.3.2 MIME-Version: 1.0 From: Linus Walleij The file is included from upper directories and deal with generic GPIO and gpiolib stuff. Break out the platform and driver specific defines and functions into its own header file. Cc: Sekhar Nori Cc: Kevin Hilman Signed-off-by: Linus Walleij --- arch/arm/mach-davinci/da830.c | 1 + arch/arm/mach-davinci/da850.c | 1 + arch/arm/mach-davinci/dm355.c | 2 +- arch/arm/mach-davinci/dm365.c | 3 +- arch/arm/mach-davinci/dm644x.c | 2 +- arch/arm/mach-davinci/dm646x.c | 2 +- arch/arm/mach-davinci/include/mach/gpio-davinci.h | 91 +++++++++++++++++++++ arch/arm/mach-davinci/include/mach/gpio.h | 76 +----------------- arch/arm/mach-davinci/tnetv107x.c | 1 + 9 files changed, 100 insertions(+), 79 deletions(-) create mode 100644 arch/arm/mach-davinci/include/mach/gpio-davinci.h diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 358ed0d..a6bf5dc 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 71a4aa2..4aae015 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index a3a94e9..c143f43 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -13,7 +13,6 @@ #include #include #include -#include #include @@ -30,6 +29,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 4604e72..679e168 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include @@ -34,7 +33,7 @@ #include #include #include - +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 4c82c27..9a27466 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -12,7 +12,6 @@ #include #include #include -#include #include @@ -26,6 +25,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 1802e71..03e5f49 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -13,7 +13,6 @@ #include #include #include -#include #include @@ -27,6 +26,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" diff --git a/arch/arm/mach-davinci/include/mach/gpio-davinci.h b/arch/arm/mach-davinci/include/mach/gpio-davinci.h new file mode 100644 index 0000000..1fdd1fd --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/gpio-davinci.h @@ -0,0 +1,91 @@ +/* + * TI DaVinci GPIO Support + * + * Copyright (c) 2006 David Brownell + * Copyright (c) 2007, MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DAVINCI_DAVINCI_GPIO_H +#define __DAVINCI_DAVINCI_GPIO_H + +#include +#include + +#include + +#include +#include + +#define DAVINCI_GPIO_BASE 0x01C67000 + +enum davinci_gpio_type { + GPIO_TYPE_DAVINCI = 0, + GPIO_TYPE_TNETV107X, +}; + +/* + * basic gpio routines + * + * board-specific init should be done by arch/.../.../board-XXX.c (maybe + * initializing banks together) rather than boot loaders; kexec() won't + * go through boot loaders. + * + * the gpio clock will be turned on when gpios are used, and you may also + * need to pay attention to PINMUX registers to be sure those pins are + * used as gpios, not with other peripherals. + * + * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, + * and maybe for later updates, code may write GPIO(N). These may be + * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip + * may not support all the GPIOs in that range. + * + * GPIOs can also be on external chips, numbered after the ones built-in + * to the DaVinci chip. For now, they won't be usable as IRQ sources. + */ +#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ + +/* Convert GPIO signal to GPIO pin number */ +#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) + +struct davinci_gpio_controller { + struct gpio_chip chip; + int irq_base; + spinlock_t lock; + void __iomem *regs; + void __iomem *set_data; + void __iomem *clr_data; + void __iomem *in_data; +}; + +/* The __gpio_to_controller() and __gpio_mask() functions inline to constants + * with constant parameters; or in outlined code they execute at runtime. + * + * You'd access the controller directly when reading or writing more than + * one gpio value at a time, and to support wired logic where the value + * being driven by the cpu need not match the value read back. + * + * These are NOT part of the cross-platform GPIO interface + */ +static inline struct davinci_gpio_controller * +__gpio_to_controller(unsigned gpio) +{ + struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs; + int index = gpio / 32; + + if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num) + return NULL; + + return ctlrs + index; +} + +static inline u32 __gpio_mask(unsigned gpio) +{ + return 1 << (gpio % 32); +} + +#endif /* __DAVINCI_DAVINCI_GPIO_H */ diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index 14e7bb20..fbaae47 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h @@ -13,82 +13,10 @@ #ifndef __DAVINCI_GPIO_H #define __DAVINCI_GPIO_H -#include -#include - #include -#include -#include - -#define __ARM_GPIOLIB_COMPLEX - -#define DAVINCI_GPIO_BASE 0x01C67000 - -enum davinci_gpio_type { - GPIO_TYPE_DAVINCI = 0, - GPIO_TYPE_TNETV107X, -}; - -/* - * basic gpio routines - * - * board-specific init should be done by arch/.../.../board-XXX.c (maybe - * initializing banks together) rather than boot loaders; kexec() won't - * go through boot loaders. - * - * the gpio clock will be turned on when gpios are used, and you may also - * need to pay attention to PINMUX registers to be sure those pins are - * used as gpios, not with other peripherals. - * - * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, - * and maybe for later updates, code may write GPIO(N). These may be - * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip - * may not support all the GPIOs in that range. - * - * GPIOs can also be on external chips, numbered after the ones built-in - * to the DaVinci chip. For now, they won't be usable as IRQ sources. - */ -#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ - -/* Convert GPIO signal to GPIO pin number */ -#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) - -struct davinci_gpio_controller { - struct gpio_chip chip; - int irq_base; - spinlock_t lock; - void __iomem *regs; - void __iomem *set_data; - void __iomem *clr_data; - void __iomem *in_data; -}; - -/* The __gpio_to_controller() and __gpio_mask() functions inline to constants - * with constant parameters; or in outlined code they execute at runtime. - * - * You'd access the controller directly when reading or writing more than - * one gpio value at a time, and to support wired logic where the value - * being driven by the cpu need not match the value read back. - * - * These are NOT part of the cross-platform GPIO interface - */ -static inline struct davinci_gpio_controller * -__gpio_to_controller(unsigned gpio) -{ - struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs; - int index = gpio / 32; - - if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num) - return NULL; - - return ctlrs + index; -} - -static inline u32 __gpio_mask(unsigned gpio) -{ - return 1 << (gpio % 32); -} +/* The inline versions use the static inlines in the driver header */ +#include "gpio-davinci.h" /* * The get/set/clear functions will inline when called with constant diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c index c92641a..409bb86 100644 --- a/arch/arm/mach-davinci/tnetv107x.c +++ b/arch/arm/mach-davinci/tnetv107x.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h"