From patchwork Tue Feb 5 19:48:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 14562 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D91C423E92 for ; Tue, 5 Feb 2013 19:49:21 +0000 (UTC) Received: from mail-ve0-f170.google.com (mail-ve0-f170.google.com [209.85.128.170]) by fiordland.canonical.com (Postfix) with ESMTP id 235D7A1984B for ; Tue, 5 Feb 2013 19:49:21 +0000 (UTC) Received: by mail-ve0-f170.google.com with SMTP id 14so466598vea.15 for ; Tue, 05 Feb 2013 11:49:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type:x-gm-message-state; bh=RHE9BBGYlE7+5zgmSTvi1k5f63+GIXMo0UbQcMspi0U=; b=OpXEypM70uzpSlesQrB+pUTgBdtaRFZkKo1BfyxIDk7nHn3VU1Vpboh0SjEn1t8pn1 QPfXeFo0giqmhG6zp7T0yvbEql8zddmWTBMwhxtZ+TNIil18vlAAn15BWg8F2TehTN+3 l4TWtaoh1gkTdiQ8CzeMYCmVzeo66Ix2XmAgDTaWoTKiTDZjZeYAvhLX5AdnkaYt0Idy hFqoIqVHz9C+Rp4R8ID/OAdMGdPG7L1wMXF2t3tBX0vfk0R+W3CPlPJwK3MPYvRgDLEv /iAR5WN9Ko7usCtlBIKEYk2UfxykqUTvyeCpO4gpWyr6PoOQInhhwKa1v5j32VU6+Yd1 7Mpg== X-Received: by 10.52.24.98 with SMTP id t2mr22335378vdf.69.1360093760648; Tue, 05 Feb 2013 11:49:20 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp143958vec; Tue, 5 Feb 2013 11:49:20 -0800 (PST) X-Received: by 10.14.218.71 with SMTP id j47mr88956186eep.28.1360093759754; Tue, 05 Feb 2013 11:49:19 -0800 (PST) Received: from eu1sys200aog101.obsmtp.com (eu1sys200aog101.obsmtp.com [207.126.144.111]) by mx.google.com with SMTP id r2si36930285eeo.162.2013.02.05.11.49.10 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 05 Feb 2013 11:49:19 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.111 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.111; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.111 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob101.postini.com ([207.126.147.11]) with SMTP ID DSNKURFiNk46MSpE0HHxhbPRB5dK7XurEqQB@postini.com; Tue, 05 Feb 2013 19:49:19 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 6426BAD; Tue, 5 Feb 2013 19:40:57 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 6B53AD42; Tue, 5 Feb 2013 19:49:06 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 3ECE7A8072; Tue, 5 Feb 2013 20:48:58 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 5 Feb 2013 20:49:04 +0100 From: Linus Walleij To: , Cc: Stephen Warren , Anmar Oueja , Lee Jones , Linus Walleij Subject: [PATCH 06/14] pinctrl/abx500: align GPIO cluster boundaries Date: Tue, 5 Feb 2013 20:48:27 +0100 Message-ID: <1360093715-6348-7-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> References: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlBrdhFhAaFm2GImnHi55fmuQutpBvKFP/ey07xBFyVGbeKTYxtiRwKsL9pLLRqPgWljhnl From: Lee Jones Not quite sure how this ever worked. In ab8500_gpio_to_irq() the GPIO for conversion is passed through as the second argument. If GPIO13, which is a valid GPIO for IRQ functionality, was received; it would be rejected by the following guard: GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */ if (offset >= cluster->start && offset <= cluster->end) /* Valid GPIO for IRQ use */ Signed-off-by: Lee Jones [Augmented to account for off-by-one problem] Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ab8500.c | 6 +++--- drivers/pinctrl/pinctrl-ab8505.c | 10 +++++----- drivers/pinctrl/pinctrl-ab8540.c | 4 ++-- drivers/pinctrl/pinctrl-ab9540.c | 8 ++++---- drivers/pinctrl/pinctrl-abx500.c | 6 ++++-- 5 files changed, 18 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ab8500.c b/drivers/pinctrl/pinctrl-ab8500.c index 2cd424e..67dc942 100644 --- a/drivers/pinctrl/pinctrl-ab8500.c +++ b/drivers/pinctrl/pinctrl-ab8500.c @@ -456,9 +456,9 @@ struct alternate_functions ab8500_alternate_functions[AB8500_GPIO_MAX_NUMBER + 1 * GPIO36 to GPIO41 */ struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(5, 12, 0), /* GPIO numbers start from 1 */ - GPIO_IRQ_CLUSTER(23, 24, 0), - GPIO_IRQ_CLUSTER(35, 40, 0), + GPIO_IRQ_CLUSTER(6, 13, 0), + GPIO_IRQ_CLUSTER(24, 25, 0), + GPIO_IRQ_CLUSTER(36, 41, 0), }; static struct abx500_pinctrl_soc_data ab8500_soc = { diff --git a/drivers/pinctrl/pinctrl-ab8505.c b/drivers/pinctrl/pinctrl-ab8505.c index 40dc3e1..825710a 100644 --- a/drivers/pinctrl/pinctrl-ab8505.c +++ b/drivers/pinctrl/pinctrl-ab8505.c @@ -349,11 +349,11 @@ struct alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1 * GPIO52 to GPIO53 */ struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(9, 10, 0), /* GPIO numbers start from 1 */ - GPIO_IRQ_CLUSTER(12, 12, 0), - GPIO_IRQ_CLUSTER(39, 40, 0), - GPIO_IRQ_CLUSTER(49, 49, 0), - GPIO_IRQ_CLUSTER(51, 52, 0), + GPIO_IRQ_CLUSTER(10, 11, 0), + GPIO_IRQ_CLUSTER(13, 13, 0), + GPIO_IRQ_CLUSTER(40, 41, 0), + GPIO_IRQ_CLUSTER(50, 50, 0), + GPIO_IRQ_CLUSTER(52, 53, 0), }; static struct abx500_pinctrl_soc_data ab8505_soc = { diff --git a/drivers/pinctrl/pinctrl-ab8540.c b/drivers/pinctrl/pinctrl-ab8540.c index e75310d..0fcd943 100644 --- a/drivers/pinctrl/pinctrl-ab8540.c +++ b/drivers/pinctrl/pinctrl-ab8540.c @@ -377,8 +377,8 @@ static struct pullud ab8540_pullud = { * GPIO51 to GPIO54 */ struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(42, 43, 2), /* GPIO numbers start from 1 */ - GPIO_IRQ_CLUSTER(50, 53, 0), + GPIO_IRQ_CLUSTER(43, 44, 2), + GPIO_IRQ_CLUSTER(51, 54, 0), }; static struct abx500_pinctrl_soc_data ab8540_soc = { diff --git a/drivers/pinctrl/pinctrl-ab9540.c b/drivers/pinctrl/pinctrl-ab9540.c index 31fec3e..28dfb2e 100644 --- a/drivers/pinctrl/pinctrl-ab9540.c +++ b/drivers/pinctrl/pinctrl-ab9540.c @@ -455,10 +455,10 @@ struct alternate_functions ab9540alternate_functions[AB9540_GPIO_MAX_NUMBER + 1] }; struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = { - GPIO_IRQ_CLUSTER(9, 12, 0), /* GPIO numbers start from 1 */ - GPIO_IRQ_CLUSTER(23, 24, 0), - GPIO_IRQ_CLUSTER(39, 40, 0), - GPIO_IRQ_CLUSTER(49, 53, 0), + GPIO_IRQ_CLUSTER(10, 13, 0), + GPIO_IRQ_CLUSTER(24, 25, 0), + GPIO_IRQ_CLUSTER(40, 41, 0), + GPIO_IRQ_CLUSTER(50, 54, 0), }; static struct abx500_pinctrl_soc_data ab9540_soc = { diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c index 9bdfcb9..a9e720f 100644 --- a/drivers/pinctrl/pinctrl-abx500.c +++ b/drivers/pinctrl/pinctrl-abx500.c @@ -272,6 +272,8 @@ static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) { struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); + /* The AB8500 GPIO numbers are off by one */ + int gpio = offset + 1; int base = pct->irq_base; int i; @@ -279,8 +281,8 @@ static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) struct abx500_gpio_irq_cluster *cluster = &pct->irq_cluster[i]; - if (offset >= cluster->start && offset <= cluster->end) - return base + offset - cluster->start; + if (gpio >= cluster->start && gpio <= cluster->end) + return base + gpio - cluster->start; /* Advance by the number of gpios in this cluster */ base += cluster->end + cluster->offset - cluster->start + 1;