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[108.47.66.231]) by mx.google.com with ESMTPSA id fk5sm1662139pbc.53.2014.09.01.11.48.13 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 11:48:13 -0700 (PDT) From: Mike Turquette To: linux-kernel@vger.kernel.org Cc: patches@linaro.org, Mike Turquette , Andrew Lunn Subject: [PATCH 1/3] clk: mvebu: share locks between gate clocks Date: Mon, 1 Sep 2014 11:47:03 -0700 Message-Id: <1409597225-24368-2-git-send-email-mturquette@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1409597225-24368-1-git-send-email-mturquette@linaro.org> References: <1409597225-24368-1-git-send-email-mturquette@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mturquette@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Refactor mvebu_clk_gating_setup() to use a common spinlock instead of a unique lock for every instance of a struct clk_gating_ctrl object. This will be used later for a separate mux clock type that shares a register with gate clock types and needs to use the same lock to protect access to the register. Cc: Andrew Lunn Tested-by: Andrew Lunn Signed-off-by: Mike Turquette --- drivers/clk/mvebu/common.c | 9 ++++++--- drivers/clk/mvebu/common.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c index 25ceccf..8145c4e 100644 --- a/drivers/clk/mvebu/common.c +++ b/drivers/clk/mvebu/common.c @@ -89,8 +89,10 @@ void __init mvebu_coreclk_setup(struct device_node *np, * Clock Gating Control */ +DEFINE_SPINLOCK(ctrl_gating_lock); + struct clk_gating_ctrl { - spinlock_t lock; + spinlock_t *lock; struct clk **gates; int num_gates; }; @@ -138,7 +140,8 @@ void __init mvebu_clk_gating_setup(struct device_node *np, if (WARN_ON(!ctrl)) goto ctrl_out; - spin_lock_init(&ctrl->lock); + /* lock must already be initialized */ + ctrl->lock = &ctrl_gating_lock; /* Count, allocate, and register clock gates */ for (n = 0; desc[n].name;) @@ -155,7 +158,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np, (desc[n].parent) ? desc[n].parent : default_parent; ctrl->gates[n] = clk_register_gate(NULL, desc[n].name, parent, desc[n].flags, base, desc[n].bit_idx, - 0, &ctrl->lock); + 0, ctrl->lock); WARN_ON(IS_ERR(ctrl->gates[n])); } diff --git a/drivers/clk/mvebu/common.h b/drivers/clk/mvebu/common.h index f968b4d..8cd28e4 100644 --- a/drivers/clk/mvebu/common.h +++ b/drivers/clk/mvebu/common.h @@ -17,6 +17,8 @@ #include +extern spinlock_t ctrl_gating_lock; + struct device_node; struct coreclk_ratio {