From patchwork Mon Sep 1 18:47:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 36421 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f69.google.com (mail-pa0-f69.google.com [209.85.220.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 32A592032B for ; Mon, 1 Sep 2014 18:48:31 +0000 (UTC) Received: by mail-pa0-f69.google.com with SMTP id kx10sf65450541pab.8 for ; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=M9LFzS+ETJLsGxXr3sQM6eRD5aN+xR5OlZstvkg4kCw=; b=FGxwtvI3NLVwUPTsy3VdMcvV1LVkozplTvV7sBXAn8TvLlBpejGhyJERxhKAUbhZMz dC3KpiGllCquMUkw8UM9+XmNs4Dcx20y1o40vZPI+UGUvQEUuQEzu4Yfhgo+DnvcR/yO 5Q+M0iGkRAtGSMvod9PzjctpPvl6ImNRlv5LtWqy+WFk7KsVtcY0BKMbKmIcjqK5cq0Z 32dsZncPOprzRm/OlKyPl0RmKuo28RfjTvIhh9qYqB2QpKisbX7l3D4aASBcPJzpVQr+ g7iKMLtIGw4jSEz4zxqIjgcuL7C9qaWKMoaeovVPZXLwu8ia3AwRLrWxwlQHPvpi5t0C TZVg== X-Gm-Message-State: ALoCoQmDkAr5L9Cv2Mt8hmS/piAHT8eK0wwihy+EMGHNADVVAVQUqPtoBSzXo2FJNV4mbx7OY9JL X-Received: by 10.66.162.162 with SMTP id yb2mr15819347pab.39.1409597310490; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.108.38 with SMTP id i35ls2127085qgf.76.gmail; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) X-Received: by 10.221.38.4 with SMTP id tg4mr1780357vcb.44.1409597310374; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) Received: from mail-vc0-f171.google.com (mail-vc0-f171.google.com [209.85.220.171]) by mx.google.com with ESMTPS id dp8si1172881vcb.12.2014.09.01.11.48.30 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 11:48:30 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) client-ip=209.85.220.171; Received: by mail-vc0-f171.google.com with SMTP id id10so5857575vcb.2 for ; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) X-Received: by 10.52.141.76 with SMTP id rm12mr1360120vdb.71.1409597310287; Mon, 01 Sep 2014 11:48:30 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.221.45.67 with SMTP id uj3csp424559vcb; Mon, 1 Sep 2014 11:48:29 -0700 (PDT) X-Received: by 10.70.93.8 with SMTP id cq8mr6551007pdb.160.1409597309384; Mon, 01 Sep 2014 11:48:29 -0700 (PDT) Received: from mail-pd0-f178.google.com (mail-pd0-f178.google.com [209.85.192.178]) by mx.google.com with ESMTPS id qn8si2330455pdb.197.2014.09.01.11.48.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 11:48:29 -0700 (PDT) Received-SPF: pass (google.com: domain of mturquette@linaro.org designates 209.85.192.178 as permitted sender) client-ip=209.85.192.178; Received: by mail-pd0-f178.google.com with SMTP id y13so6702933pdi.23 for ; Mon, 01 Sep 2014 11:48:29 -0700 (PDT) X-Received: by 10.68.65.69 with SMTP id v5mr6351197pbs.156.1409597309001; Mon, 01 Sep 2014 11:48:29 -0700 (PDT) Received: from quantum.home (pool-108-47-66-231.lsanca.fios.verizon.net. [108.47.66.231]) by mx.google.com with ESMTPSA id fk5sm1662139pbc.53.2014.09.01.11.48.27 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 11:48:28 -0700 (PDT) From: Mike Turquette To: linux-kernel@vger.kernel.org Cc: patches@linaro.org, Mike Turquette , Tomeu Vizoso Subject: [PATCH 2/3] clk: mvebu: powersave clock is a multiplexer Date: Mon, 1 Sep 2014 11:47:04 -0700 Message-Id: <1409597225-24368-3-git-send-email-mturquette@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1409597225-24368-1-git-send-email-mturquette@linaro.org> References: <1409597225-24368-1-git-send-email-mturquette@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mturquette@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Kirkwood is unique among the mvebu SoCs for having a clock multiplexer that feeds into the cpu. This multiplexer can select either the cpu pll or the ddr clock as its input signal, allowing for a choice between performance and power savings. This patch introduces the code needed to register the clock multiplexer on Kirkwood SoCs but does not include the clock data to actually register the clock. That will be done in a follow-up patch which is necessary to prevent breaking git bisect. Cc: Tomeu Vizoso Tested-by: Andrew Lunn Signed-off-by: Mike Turquette --- drivers/clk/mvebu/kirkwood.c | 87 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c index ddb666a..f73a2fa 100644 --- a/drivers/clk/mvebu/kirkwood.c +++ b/drivers/clk/mvebu/kirkwood.c @@ -13,9 +13,11 @@ */ #include +#include #include #include #include +#include #include "common.h" /* @@ -225,6 +227,91 @@ static const struct clk_gating_soc_desc kirkwood_gating_desc[] __initconst = { { } }; + +/* + * Clock Muxing Control + */ + +struct clk_muxing_soc_desc { + const char *name; + const char **parents; + int num_parents; + int shift; + int width; + unsigned long flags; +}; + +struct clk_muxing_ctrl { + spinlock_t *lock; + struct clk **muxes; + int num_muxes; +}; + +#define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw) + +static struct clk *clk_muxing_get_src( + struct of_phandle_args *clkspec, void *data) +{ + struct clk_muxing_ctrl *ctrl = (struct clk_muxing_ctrl *)data; + int n; + + if (clkspec->args_count < 1) + return ERR_PTR(-EINVAL); + + for (n = 0; n < ctrl->num_muxes; n++) { + struct clk_mux *mux = + to_clk_mux(__clk_get_hw(ctrl->muxes[n])); + if (clkspec->args[0] == mux->shift) + return ctrl->muxes[n]; + } + return ERR_PTR(-ENODEV); +} + +static void __init kirkwood_clk_muxing_setup(struct device_node *np, + const struct clk_muxing_soc_desc *desc) +{ + struct clk_muxing_ctrl *ctrl; + void __iomem *base; + int n; + + base = of_iomap(np, 0); + if (WARN_ON(!base)) + return; + + ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); + if (WARN_ON(!ctrl)) + goto ctrl_out; + + /* lock must already be initialized */ + ctrl->lock = &ctrl_gating_lock; + + /* Count, allocate, and register clock muxes */ + for (n = 0; desc[n].name;) + n++; + + ctrl->num_muxes = n; + ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *), + GFP_KERNEL); + if (WARN_ON(!ctrl->muxes)) + goto muxes_out; + + for (n = 0; n < ctrl->num_muxes; n++) { + ctrl->muxes[n] = clk_register_mux(NULL, desc[n].name, + desc[n].parents, desc[n].num_parents, + desc[n].flags, base, desc[n].shift, + desc[n].width, desc[n].flags, ctrl->lock); + WARN_ON(IS_ERR(ctrl->muxes[n])); + } + + of_clk_add_provider(np, clk_muxing_get_src, ctrl); + + return; +muxes_out: + kfree(ctrl); +ctrl_out: + iounmap(base); +} + static void __init kirkwood_clk_init(struct device_node *np) { struct device_node *cgnp =