From patchwork Wed Sep 24 17:17:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 37858 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ee0-f69.google.com (mail-ee0-f69.google.com [74.125.83.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id EA253202FD for ; Wed, 24 Sep 2014 17:24:04 +0000 (UTC) Received: by mail-ee0-f69.google.com with SMTP id e53sf867482eek.8 for ; Wed, 24 Sep 2014 10:24:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=rVYdh5w34rzF3R556pcvlMhBc3W4oTcdyu9VjYEbX7w=; b=aVbufeo6Mwe9Lky16qtLyMB3+wYPt+IeMGJNCez7GdtppZUz9tm7oroSipppVxWkh0 b0ydPn6uE9KsFP1T0Y+0qLBuM5QGjgoj8w6dxY3FerbULjNoq+aMdclClKnmTS1vXlh0 tyi8saA2otSCFbqe5DDdHal4Hy5oPgplgiUHS8jks4bxre9zXgWEZAJtQGM7EIOBmHKN ND3QQmVZlYAcrEXx91bwlD6wfmgQYmsFapy7Ul9Bz2hQmT1SGnoa+hdvcHcS+dpQXSkG hx3udKxGz+xQYdG0/GMBU4UaQ1lmwSikijp+bnoWRagmodGzU59lOrH7kKMREH3lA8Wx pTVQ== X-Gm-Message-State: ALoCoQlGzvff80ffhOc0RK1bTIvO/xYdg4NICylOQPTebPKwBdqdu0LGSs+jWT5Vk7ae/fMgeLYY X-Received: by 10.152.4.4 with SMTP id g4mr1253271lag.2.1411579444100; Wed, 24 Sep 2014 10:24:04 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.246.35 with SMTP id xt3ls165783lac.67.gmail; Wed, 24 Sep 2014 10:24:03 -0700 (PDT) X-Received: by 10.112.146.1 with SMTP id sy1mr7196135lbb.77.1411579443898; Wed, 24 Sep 2014 10:24:03 -0700 (PDT) Received: from mail-la0-f43.google.com (mail-la0-f43.google.com [209.85.215.43]) by mx.google.com with ESMTPS id bh7si23652402lbb.91.2014.09.24.10.24.03 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Sep 2014 10:24:03 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) client-ip=209.85.215.43; Received: by mail-la0-f43.google.com with SMTP id gb8so1570234lab.30 for ; Wed, 24 Sep 2014 10:24:03 -0700 (PDT) X-Received: by 10.152.7.8 with SMTP id f8mr7726054laa.27.1411579443704; Wed, 24 Sep 2014 10:24:03 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.130.169 with SMTP id of9csp621636lbb; Wed, 24 Sep 2014 10:24:02 -0700 (PDT) X-Received: by 10.70.96.237 with SMTP id dv13mr11810606pdb.66.1411579442191; Wed, 24 Sep 2014 10:24:02 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s1si27184002pdf.200.2014.09.24.10.23.51 for ; Wed, 24 Sep 2014 10:24:02 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754714AbaIXRXi (ORCPT + 27 others); Wed, 24 Sep 2014 13:23:38 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:41669 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753864AbaIXRUi (ORCPT ); Wed, 24 Sep 2014 13:20:38 -0400 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.204]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s8OHInwo025674; Wed, 24 Sep 2014 18:18:49 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id E729F1AE0811; Wed, 24 Sep 2014 18:18:56 +0100 (BST) From: Will Deacon To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, benh@kernel.crashing.org, chris@zankel.net, cmetcalf@tilera.com, davem@davemloft.net, deller@gmx.de, dhowells@redhat.com, geert@linux-m68k.org, heiko.carstens@de.ibm.com, hpa@zytor.com, jcmvbkbc@gmail.com, jesper.nilsson@axis.com, mingo@redhat.com, monstr@monstr.eu, paulmck@linux.vnet.ibm.com, rdunlap@infradead.org, sam@ravnborg.org, schwidefsky@de.ibm.com, starvik@axis.com, takata@linux-m32r.org, tglx@linutronix.de, tony.luck@intel.com, daniel.thompson@linaro.org, broonie@linaro.org, linux@arm.linux.org.uk, Will Deacon Subject: [PATCH v3 01/17] asm-generic: io: implement relaxed accessor macros as conditional wrappers Date: Wed, 24 Sep 2014 18:17:20 +0100 Message-Id: <1411579056-16966-2-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1411579056-16966-1-git-send-email-will.deacon@arm.com> References: <1411579056-16966-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , {read,write}{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds wrappers to asm-generic so that drivers can rely on the relaxed accessors being available, even if they don't always provide weaker ordering guarantees. Since some architectures both include asm-generic/io.h and define some relaxed accessors, the definitions here are conditional for the time being. Cc: Arnd Bergmann Signed-off-by: Will Deacon Acked-by: Arnd Bergmann --- include/asm-generic/io.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index 975e1cc75edb..9ccedeb06522 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h @@ -53,18 +53,27 @@ static inline u32 __raw_readl(const volatile void __iomem *addr) #endif #define readb __raw_readb +#ifndef readb_relaxed +#define readb_relaxed readb +#endif #define readw readw static inline u16 readw(const volatile void __iomem *addr) { return __le16_to_cpu(__raw_readw(addr)); } +#ifndef readw_relaxed +#define readw_relaxed readw +#endif #define readl readl static inline u32 readl(const volatile void __iomem *addr) { return __le32_to_cpu(__raw_readl(addr)); } +#ifndef readl_relaxed +#define readl_relaxed readl +#endif #ifndef __raw_writeb static inline void __raw_writeb(u8 b, volatile void __iomem *addr) @@ -88,8 +97,19 @@ static inline void __raw_writel(u32 b, volatile void __iomem *addr) #endif #define writeb __raw_writeb +#ifndef writeb_relaxed +#define writeb_relaxed writeb +#endif + #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr) +#ifndef writew_relaxed +#define writew_relaxed writew +#endif + #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr) +#ifndef writel_relaxed +#define writel_relaxed writel +#endif #ifdef CONFIG_64BIT #ifndef __raw_readq @@ -104,6 +124,9 @@ static inline u64 readq(const volatile void __iomem *addr) { return __le64_to_cpu(__raw_readq(addr)); } +#ifndef readq_relaxed +#define readq_relaxed readq +#endif #ifndef __raw_writeq static inline void __raw_writeq(u64 b, volatile void __iomem *addr) @@ -113,6 +136,9 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr) #endif #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) +#ifndef writeq_relaxed +#define writeq_relaxed writeq +#endif #endif /* CONFIG_64BIT */ #ifndef PCI_IOBASE