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Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Liviu Dudau , Yijing Wang Subject: [PATCH v3 22/27] s390/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Wed, 15 Oct 2014 11:07:10 +0800 Message-ID: <1413342435-7876-23-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> References: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- Hi Sebastian, I dropped the Acked-by , because this version has a lot changes compared to last. So, I guess you may want to check it again. --- arch/s390/include/asm/pci.h | 9 +++++++++ arch/s390/pci/pci.c | 12 ++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h index c030900..4d41f08 100644 --- a/arch/s390/include/asm/pci.h +++ b/arch/s390/include/asm/pci.h @@ -88,6 +88,8 @@ struct zpci_dev { u32 uid; /* user defined id */ u8 util_str[CLP_UTIL_STR_LEN]; /* utility string */ + struct msi_chip *msi_chip; + /* IRQ stuff */ u64 msi_addr; /* MSI address */ struct airq_iv *aibv; /* adapter interrupt bit vector */ @@ -121,6 +123,13 @@ struct zpci_dev { struct dentry *debugfs_perf; }; +static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus) +{ + struct zpci_dev *zpci = bus->sysdata; + + return zpci->msi_chip; +} + static inline bool zdev_enabled(struct zpci_dev *zdev) { return (zdev->fh & (1UL << 31)) ? true : false; diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c index 552b990..bf6732f 100644 --- a/arch/s390/pci/pci.c +++ b/arch/s390/pci/pci.c @@ -358,7 +358,8 @@ static void zpci_irq_handler(struct airq_struct *airq) } } -int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) +static int zpci_setup_msi_irqs(struct msi_chip *chip, + struct pci_dev *pdev, int nvec, int type) { struct zpci_dev *zdev = get_zdev(pdev); unsigned int hwirq, msi_vecs; @@ -434,7 +435,8 @@ out: return rc; } -void arch_teardown_msi_irqs(struct pci_dev *pdev) +static void zpci_teardown_msi_irqs(struct msi_chip *chip, + struct pci_dev *pdev) { struct zpci_dev *zdev = get_zdev(pdev); struct msi_desc *msi; @@ -464,6 +466,11 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev) airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); } +static struct msi_chip zpci_msi_chip = { + .setup_irqs = zpci_setup_msi_irqs, + .teardown_irqs = zpci_teardown_msi_irqs, +}; + static void zpci_map_resources(struct zpci_dev *zdev) { struct pci_dev *pdev = zdev->pdev; @@ -749,6 +756,7 @@ static int zpci_scan_bus(struct zpci_dev *zdev) if (ret) return ret; + zdev->msi_chip = &zpci_msi_chip; zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops, zdev, &resources); if (!zdev->bus) {