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[209.132.180.67]) by mx.google.com with ESMTP id qo2si9779027pdb.147.2014.10.27.00.08.36 for ; Mon, 27 Oct 2014 00:08:36 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752386AbaJ0HId (ORCPT + 26 others); Mon, 27 Oct 2014 03:08:33 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:6584 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751490AbaJ0HIa (ORCPT ); Mon, 27 Oct 2014 03:08:30 -0400 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CDM12569; Mon, 27 Oct 2014 15:07:37 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Mon, 27 Oct 2014 15:07:25 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , Thomas Gleixner , "Thierry Reding" , Thomas Petazzoni , Yijing Wang Subject: [PATCH 10/10] PCI/MSI: Remove useless bus->msi assignment Date: Mon, 27 Oct 2014 15:48:47 +0800 Message-ID: <1414396127-30023-11-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1414396127-30023-1-git-send-email-wangyijing@huawei.com> References: <1414396127-30023-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Thierry introduced MSI chip(now renamed to MSI controller) framework to associate MSI chip and PCI bus in arm. Other platforms still use its own arch MSI functions to support MSI capability. Thierry introduced the bus->msi assignment to make child bus can inherit bus->msi from the parent. But in fact, drivers which used MSI chip always associate MSI chip and PCI bus by add .add_bus() in arm PCI host bridge drivers. Now we have saved MSI chip in pci_sys_data. We can remove this bus->msi assignment safely. Signed-off-by: Yijing Wang CC: Thierry Reding CC: Thomas Petazzoni --- drivers/pci/msi.c | 5 ----- drivers/pci/probe.c | 1 - 2 files changed, 0 insertions(+), 6 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index f085f7f..27b6a54 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -37,11 +37,6 @@ struct msi_controller * __weak pcibios_msi_controller(struct pci_bus *bus) struct msi_controller *pci_msi_controller(struct pci_bus *bus) { - struct msi_controller *ctrl = bus->msi; - - if (ctrl) - return ctrl; - return pcibios_msi_controller(bus); } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 5ed9930..4b18bf2 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -682,7 +682,6 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent, child->parent = parent; child->ops = parent->ops; - child->msi = parent->msi; child->sysdata = parent->sysdata; child->bus_flags = parent->bus_flags;