From patchwork Mon Oct 27 07:48:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wangyijing X-Patchwork-Id: 39558 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C993E2118A for ; Mon, 27 Oct 2014 07:09:16 +0000 (UTC) Received: by mail-la0-f69.google.com with SMTP id q1sf905238lam.4 for ; Mon, 27 Oct 2014 00:09:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=l8xSxWoAwFvECyLkgI4ey0ijunmeLEGLMxP7/ciHrAs=; b=iNJ6X2CIBKkgxW/WI4TCC6rP897QwUCQ4EVFrLvgIgsMI4H4XUdeClRLV+i+hxqW8H yvKgj5PnswGxGzeQIxsWhJL8NuVWPCZunsNvh+qyh9kN0dGCuRvoeZyOuAUNLMH3Z+Ji KB3puVEAwuxdBEinEO4/RzqbaBcgoNb5fRJw506rim820vYHI0h0sZO/2hdyKXneJYjN XJol8S+crPRkVObNn2SquvxmD6vKjt5zTV4YoRT/jM5ld/ywpnmHSbJ7lEY8+w6ofC+l 6xrRKyLCbZ+3ha1fYUuPjSKt4l1jded/3gNz9sbOmsksExt8cEa5zMrZVaY2+exIWOY+ Or5Q== X-Gm-Message-State: ALoCoQnZMkZe58bAJrse7XObsZ/9yeYUwLvl09/fDLk4zUJ5pIViunj2Y5yBaF8toeWwqDUSO1Ay X-Received: by 10.194.58.47 with SMTP id n15mr1806523wjq.0.1414393754678; Mon, 27 Oct 2014 00:09:14 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.27.97 with SMTP id s1ls670522lag.81.gmail; Mon, 27 Oct 2014 00:09:14 -0700 (PDT) X-Received: by 10.112.47.37 with SMTP id a5mr21289227lbn.31.1414393754400; Mon, 27 Oct 2014 00:09:14 -0700 (PDT) Received: from mail-lb0-f182.google.com (mail-lb0-f182.google.com. [209.85.217.182]) by mx.google.com with ESMTPS id ke10si18510592lbc.41.2014.10.27.00.09.14 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 27 Oct 2014 00:09:14 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) client-ip=209.85.217.182; Received: by mail-lb0-f182.google.com with SMTP id f15so4218692lbj.13 for ; Mon, 27 Oct 2014 00:09:14 -0700 (PDT) X-Received: by 10.112.130.41 with SMTP id ob9mr20976788lbb.74.1414393753955; Mon, 27 Oct 2014 00:09:13 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp242503lbz; Mon, 27 Oct 2014 00:09:13 -0700 (PDT) X-Received: by 10.70.95.73 with SMTP id di9mr477535pdb.50.1414393752105; Mon, 27 Oct 2014 00:09:12 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id oo1si9727555pdb.214.2014.10.27.00.09.11 for ; Mon, 27 Oct 2014 00:09:12 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752528AbaJ0HIX (ORCPT + 26 others); Mon, 27 Oct 2014 03:08:23 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:10225 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751099AbaJ0HIS (ORCPT ); Mon, 27 Oct 2014 03:08:18 -0400 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CBJ05370; Mon, 27 Oct 2014 15:07:33 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Mon, 27 Oct 2014 15:07:23 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , Thomas Gleixner , "Thierry Reding" , Thomas Petazzoni , Yijing Wang Subject: [PATCH 07/10] PCI: mvebu: Save MSI controller in pci_sys_data Date: Mon, 27 Oct 2014 15:48:44 +0800 Message-ID: <1414396127-30023-8-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1414396127-30023-1-git-send-email-wangyijing@huawei.com> References: <1414396127-30023-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every pci bus in .add_bus(). Signed-off-by: Yijing Wang --- drivers/pci/host/pci-mvebu.c | 10 +++------- 1 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 5ab7d16..e2db57e 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -774,12 +774,6 @@ static struct pci_bus *mvebu_pcie_scan_bus(int nr, struct pci_sys_data *sys) return bus; } -static void mvebu_pcie_add_bus(struct pci_bus *bus) -{ - struct mvebu_pcie *pcie = sys_to_pcie(bus->sysdata); - bus->msi = pcie->msi; -} - static resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev, const struct resource *res, resource_size_t start, @@ -816,6 +810,9 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie) memset(&hw, 0, sizeof(hw)); +#ifdef CONFIG_PCI_MSI + hw.msi_ctrl = pcie->msi; +#endif hw.nr_controllers = 1; hw.private_data = (void **)&pcie; hw.setup = mvebu_pcie_setup; @@ -823,7 +820,6 @@ static void mvebu_pcie_enable(struct mvebu_pcie *pcie) hw.map_irq = of_irq_parse_and_map_pci; hw.ops = &mvebu_pcie_ops; hw.align_resource = mvebu_pcie_align_resource; - hw.add_bus = mvebu_pcie_add_bus; pci_common_init(&hw); }