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[209.132.180.67]) by mx.google.com with ESMTP id q8si25715665pds.51.2014.11.13.05.19.17 for ; Thu, 13 Nov 2014 05:19:18 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933110AbaKMNTP (ORCPT + 26 others); Thu, 13 Nov 2014 08:19:15 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:45712 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932930AbaKMNS1 (ORCPT ); Thu, 13 Nov 2014 08:18:27 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NEZ000ASBRITZ40@mailout3.w1.samsung.com>; Thu, 13 Nov 2014 13:21:18 +0000 (GMT) X-AuditID: cbfec7f5-b7f956d000005ed7-41-5464afa19ea6 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 83.C0.24279.1AFA4645; Thu, 13 Nov 2014 13:18:25 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync1.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NEZ00I3CBMFKS20@eusync1.samsung.com>; Thu, 13 Nov 2014 13:18:25 +0000 (GMT) From: Marek Szyprowski To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marek Szyprowski , Tomasz Figa , Kyungmin Park , linux-samsung-soc@vger.kernel.org, Arnd Bergmann , Olof Johansson , Russell King - ARM Linux , Kukjin Kim , lauraa@codeaurora.org, linux-omap@vger.kernel.org, linus.walleij@linaro.org, tony@atomide.com, drake@endlessm.com, loeliger@gmail.com, Mark Rutland Subject: [PATCH v8 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Date: Thu, 13 Nov 2014 14:18:14 +0100 Message-id: <1415884694-5868-8-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1415884694-5868-1-git-send-email-m.szyprowski@samsung.com> References: <1415884694-5868-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBLMWRmVeSWpSXmKPExsVy+t/xy7oL16eEGLxcZ2Txd9IxdotH8x8z W/QuuMpmcbbpDbvF9s4Z7BZT/ixnstj0+BqrxeVdc9gsZi/pZ7GYcX4fk8Xty7wW57ZvYbFY e+Quu8XS6xeZLE5d/8xmsWrXH0aL/Ve8HAQ91sxbw+jR0tzD5vH71yRGj29fJ7F4XO7rZfJY 9D3LY+esu+wed67tYfPYvKTe48qJJlaPvi2rGD0+b5IL4InisklJzcksSy3St0vgyjh56h9r wW7eiuvXNrA2MPZydzFyckgImEgc/3iFGcIWk7hwbz1bFyMXh5DAUkaJvdt2MUM4fUwSTxs2 MYFUsQkYSnS97WIDsUUE3CT+rTsE1sEs8JlZ4tKjNawgCWEBH4l7M1azg9gsAqoSS08/AlvB K+Aucf70KjaIdXIS/1+uABvKKeAh8WX9H7BeIaCa9l2HGScw8i5gZFjFKJpamlxQnJSea6RX nJhbXJqXrpecn7uJERL6X3cwLj1mdYhRgINRiYf3A3dKiBBrYllxZe4hRgkOZiUR3jcrgUK8 KYmVValF+fFFpTmpxYcYmTg4pRoYjR/yTXj3/1d7l868qy9uHzxx5328QeAGyZbjm55PWvC7 ziVTa8upruDnFzIvZpYJM3eHptbaVS/PvyV558edMtVGGY0N56YduMKqNbkoePZTxub+m3YP pTZfFE7sNIltT/S5OO1no9+j6ybBM2fw5Ycy/b953r339hK2E8pbv+Y4yzb7xoeIK7EUZyQa ajEXFScCAP0D9+NbAgAA Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: m.szyprowski@samsung.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.46 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Tomasz Figa This patch adds device tree nodes for L2 cache controller present on Exynos4 SoCs. Signed-off-by: Tomasz Figa Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos4210.dtsi | 9 +++++++++ arch/arm/boot/dts/exynos4x12.dtsi | 14 ++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index bcc9e63c8070..8e45ea44317e 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -81,6 +81,15 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <2 2 1>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x8000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 861bb919f6d3..c7adfd60ad3a 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -54,6 +54,20 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <3 2 1>; + arm,double-linefill = <1>; + arm,double-linefill-incr = <0>; + arm,double-linefill-wrap = <1>; + arm,prefetch-drop = <1>; + arm,prefetch-offset = <7>; + }; + clock: clock-controller@10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>;