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[209.132.180.67]) by mx.google.com with ESMTP id dp4si34533523pbb.251.2014.11.17.01.42.29 for ; Mon, 17 Nov 2014 01:42:30 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752331AbaKQJmP (ORCPT + 26 others); Mon, 17 Nov 2014 04:42:15 -0500 Received: from szxga02-in.huawei.com ([119.145.14.65]:28888 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752086AbaKQJk5 (ORCPT ); Mon, 17 Nov 2014 04:40:57 -0500 Received: from 172.24.2.119 (EHLO szxeml462-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CCM04933; Mon, 17 Nov 2014 17:40:48 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml462-hub.china.huawei.com (10.82.67.205) with Microsoft SMTP Server id 14.3.158.1; Mon, 17 Nov 2014 17:40:41 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , Thomas Gleixner , Benjamin Herrenschmidt , , Tony Luck , , Thierry Reding , Liviu Dudau , , Yijing Wang Subject: [RFC PATCH 16/16] powerpc/PCI: Use pci_scan_host_bridge() to scan PCI bus Date: Mon, 17 Nov 2014 18:21:50 +0800 Message-ID: <1416219710-26088-17-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1416219710-26088-1-git-send-email-wangyijing@huawei.com> References: <1416219710-26088-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.46 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Yijing Wang --- arch/powerpc/kernel/pci-common.c | 81 ++++++++++++++++++++++--------------- 1 files changed, 48 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index e5dad9a..5b0f078 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -1578,54 +1578,69 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) return of_node_get(hose->dn); } -/** - * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus - * @hose: Pointer to the PCI host controller instance structure - */ -void pcibios_scan_phb(struct pci_controller *hose) +static int pcibios_host_init_res(struct pci_host_bridge *host, + struct pci_host_info *info) { - LIST_HEAD(resources); - struct pci_bus *bus; - struct device_node *node = hose->dn; - int mode; - - pr_debug("PCI: Scanning PHB %s\n", of_node_full_name(node)); + struct pci_controller *hose = info->arg; /* Get some IO space for the new PHB */ pcibios_setup_phb_io_space(hose); - /* Wire up PHB bus resources */ - pcibios_setup_phb_resources(hose, &resources); + pcibios_setup_phb_resources(hose, &host->windows); hose->busn.start = hose->first_busno; hose->busn.end = hose->last_busno; hose->busn.flags = IORESOURCE_BUS; - pci_add_resource(&resources, &hose->busn); + pci_add_resource(&host->windows, &hose->busn); + return 0; +} - /* Create an empty bus for the toplevel */ - bus = pci_create_root_bus(hose->parent, hose->first_busno, - hose->ops, hose, &resources); - if (bus == NULL) { - pr_err("Failed to create bus for PCI domain %04x\n", - hose->global_number); - pci_free_resource_list(&resources); - return; - } - hose->bus = bus; +static void pcibios_of_scan_bus(struct pci_host_bridge *host) +{ + int mode; + int max; /* Get probe mode and perform scan */ mode = PCI_PROBE_NORMAL; - if (node && ppc_md.pci_probe_mode) - mode = ppc_md.pci_probe_mode(bus); + if (host->node && ppc_md.pci_probe_mode) + mode = ppc_md.pci_probe_mode(host->bus); pr_debug(" probe mode: %d\n", mode); if (mode == PCI_PROBE_DEVTREE) - of_scan_bus(node, bus); - + of_scan_bus(host->node, host->bus); + if (mode == PCI_PROBE_NORMAL) { - pci_bus_update_busn_res_end(bus, 255); - hose->last_busno = pci_scan_child_bus(bus); - pci_bus_update_busn_res_end(bus, hose->last_busno); + pci_bus_update_busn_res_end(host->bus, 255); + max = pci_scan_child_bus(host->bus); + pci_bus_update_busn_res_end(host->bus, max); + } +} +/** + * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus + * @hose: Pointer to the PCI host controller instance structure + */ +void pcibios_scan_phb(struct pci_controller *hose) +{ + struct pci_host_bridge *host; + struct pci_host_info info; + + pr_debug("PCI: Scanning PHB %s\n", of_node_full_name(hose->dn)); + + init_pci_host_info(&info); + info.arg = hose; + info.node = hose->dn; + info.init_res = pcibios_host_init_res; + info.of_scan_bus = pcibios_of_scan_bus; + /* Create an empty bus for the toplevel */ + host = pci_scan_host_bridge(hose->parent, + PCI_DOMBUS(hose->global_number,hose->first_busno), + hose->ops, &info); + if (host == NULL) { + pr_err("Failed to create bus for PCI domain %04x\n", + hose->global_number); + return; } + hose->bus = host->bus; + hose->last_busno = host->bus->busn_res.end; /* Platform gets a chance to do some global fixups before * we proceed to resource allocation @@ -1634,9 +1649,9 @@ void pcibios_scan_phb(struct pci_controller *hose) ppc_md.pcibios_fixup_phb(hose); /* Configure PCI Express settings */ - if (bus && !pci_has_flag(PCI_PROBE_ONLY)) { + if (!pci_has_flag(PCI_PROBE_ONLY)) { struct pci_bus *child; - list_for_each_entry(child, &bus->children, node) + list_for_each_entry(child, &host->bus->children, node) pcie_bus_configure_settings(child); } }