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[209.132.180.67]) by mx.google.com with ESMTP id o8si4360064pdn.7.2015.03.20.09.31.27; Fri, 20 Mar 2015 09:31:57 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752170AbbCTQa1 (ORCPT + 27 others); Fri, 20 Mar 2015 12:30:27 -0400 Received: from mail-we0-f174.google.com ([74.125.82.174]:36079 "EHLO mail-we0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751765AbbCTQaX (ORCPT ); Fri, 20 Mar 2015 12:30:23 -0400 Received: by wetk59 with SMTP id k59so86218862wet.3 for ; Fri, 20 Mar 2015 09:30:21 -0700 (PDT) X-Received: by 10.194.104.99 with SMTP id gd3mr157059357wjb.114.1426869021530; Fri, 20 Mar 2015 09:30:21 -0700 (PDT) Received: from mms.wifi.mm-sol.com ([37.157.136.206]) by mx.google.com with ESMTPSA id nb4sm7020528wjc.20.2015.03.20.09.30.20 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 20 Mar 2015 09:30:20 -0700 (PDT) From: Georgi Djakov To: sboyd@codeaurora.org, mturquette@linaro.org Cc: galak@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 2/3] clk: qcom: Do some error handling in configure_bank() Date: Fri, 20 Mar 2015 18:30:25 +0200 Message-Id: <1426869026-26006-3-git-send-email-georgi.djakov@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1426869026-26006-1-git-send-email-georgi.djakov@linaro.org> References: <1426869026-26006-1-git-send-email-georgi.djakov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: georgi.djakov@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Currently configure_bank() returns void. Add some error checking on the regmap calls and propagate if there is any error. Signed-off-by: Georgi Djakov --- drivers/clk/qcom/clk-rcg.c | 62 +++++++++++++++++++++++++++++--------------- 1 file changed, 41 insertions(+), 21 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index 59a093e56366..64d98c62459d 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c @@ -203,10 +203,10 @@ static u32 mn_to_reg(struct mn *mn, u32 m, u32 n, u32 val) return val; } -static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) +static int configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) { u32 ns, md, reg; - int bank, new_bank; + int bank, new_bank, ret; struct mn *mn; struct pre_div *p; struct src_sel *s; @@ -218,38 +218,55 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) enabled = __clk_is_enabled(hw->clk); - regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + if (ret) + return ret; bank = reg_to_bank(rcg, reg); new_bank = enabled ? !bank : bank; ns_reg = rcg->ns_reg[new_bank]; - regmap_read(rcg->clkr.regmap, ns_reg, &ns); + ret = regmap_read(rcg->clkr.regmap, ns_reg, &ns); + if (ret) + return ret; if (banked_mn) { mn = &rcg->mn[new_bank]; md_reg = rcg->md_reg[new_bank]; ns |= BIT(mn->mnctr_reset_bit); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; - regmap_read(rcg->clkr.regmap, md_reg, &md); + ret = regmap_read(rcg->clkr.regmap, md_reg, &md); + if (ret) + return ret; md = mn_to_md(mn, f->m, f->n, md); - regmap_write(rcg->clkr.regmap, md_reg, md); - + ret = regmap_write(rcg->clkr.regmap, md_reg, md); + if (ret) + return ret; ns = mn_to_ns(mn, f->m, f->n, ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; /* Two NS registers means mode control is in NS register */ if (rcg->ns_reg[0] != rcg->ns_reg[1]) { ns = mn_to_reg(mn, f->m, f->n, ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; } else { reg = mn_to_reg(mn, f->m, f->n, reg); - regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + if (ret) + return ret; } ns &= ~BIT(mn->mnctr_reset_bit); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; } if (banked_p) { @@ -259,13 +276,20 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) s = &rcg->s[new_bank]; ns = src_to_ns(s, s->parent_map[f->src], ns); - regmap_write(rcg->clkr.regmap, ns_reg, ns); + ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); + if (ret) + return ret; if (enabled) { - regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + if (ret) + return ret; reg ^= BIT(rcg->mux_sel_bit); - regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); + if (ret) + return ret; } + return 0; } static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) @@ -292,9 +316,7 @@ static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; f.src = index; - configure_bank(rcg, &f); - - return 0; + return configure_bank(rcg, &f); } /* @@ -567,9 +589,7 @@ static int __clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate) if (!f) return -EINVAL; - configure_bank(rcg, f); - - return 0; + return configure_bank(rcg, f); } static int clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate,