From patchwork Wed Feb 3 18:39:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 61122 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp13365lbl; Wed, 3 Feb 2016 10:40:04 -0800 (PST) X-Received: by 10.66.120.200 with SMTP id le8mr4541285pab.61.1454524803283; Wed, 03 Feb 2016 10:40:03 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 127si10793086pfa.4.2016.02.03.10.40.01; Wed, 03 Feb 2016 10:40:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965868AbcBCSjt (ORCPT + 30 others); Wed, 3 Feb 2016 13:39:49 -0500 Received: from mail-pa0-f43.google.com ([209.85.220.43]:34741 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965765AbcBCSjq (ORCPT ); Wed, 3 Feb 2016 13:39:46 -0500 Received: by mail-pa0-f43.google.com with SMTP id uo6so17918744pac.1 for ; Wed, 03 Feb 2016 10:39:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uZVRcryCkeWxj99g2k6mmwgfSRna2CubH5bWqtSBdy4=; b=T2A4qGRXZYer9HD7wVXzza3raNTKmglQVKlp4Y6StDp55OGFxwlIwVawyPO0slrf9n mWJQ69uOlymMcJvGEngIPg1dU215iwXWKRnYWKqeuIN8zBQubIjDmwUYJ62mzte7JlJK WET39XcoSEaIe5At6oK1dRUAw8WnzzTQmJfM8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uZVRcryCkeWxj99g2k6mmwgfSRna2CubH5bWqtSBdy4=; b=X2U/Mv2ZLlkAdru2hbpVU8eTR6gidDi0ihH6gwgLf+1xkZiJ+PnNWfWJxZRsSKNpLX kEwH3W6NtWd3tN2nPO689uDuodS2MaYRTr4JFcQvCjZGBNbSeCunUdjz2QZMp7YmBFrm XV2cl/ESDUjvKrHMdbS1O5TSUehUaDvvlfWdrl+mwLfItj8ty4l9dTgfwT3MSq/wDxTg 4P4Vkm8DAJsxzVIZYecGCP6hBli8mWSFOJQvMsGUaOI+lwe0NGALH49tgvBI3dBvF62t xKT1YJ96Q1euAOoh+XgZEaWZU910FbEsOnLirV9ctXFFh4e1qZUse23PDHG4u9syX3Jx cxWg== X-Gm-Message-State: AG10YOQq9gY9cZ9kS7eJ0btB6zCnh9hsHpL1z4sWf5kikALeJ9weyaGDpKqRuUZCaqE3LU3N X-Received: by 10.66.150.228 with SMTP id ul4mr4568875pab.15.1454524785525; Wed, 03 Feb 2016 10:39:45 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xa9sm11369704pab.44.2016.02.03.10.39.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Feb 2016 10:39:44 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, zhang.chunyan@linaro.org, mike.leach@arm.com, alexander.shishkin@linux.intel.com, tor@ti.com Subject: [PATCH V9 06/18] coresight: etm3x: unlocking tracers in default arch init Date: Wed, 3 Feb 2016 11:39:04 -0700 Message-Id: <1454524756-10628-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> References: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Calling function 'smp_call_function_single()' to unlock a tracer and calling it again right after to perform the default initialisation doesn't make sense. Moving 'etm_os_unlock()' just before making the default initialisation results in the same outcome while saving one call to 'smp_call_function_single()'. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.1.4 diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 6ea35b350958..f2c74bb56993 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -47,11 +47,11 @@ static struct etm_drvdata *etmdrvdata[NR_CPUS]; * and OS lock must be unlocked before any memory mapped access on such * processors, otherwise memory mapped reads/writes will be invalid. */ -static void etm_os_unlock(void *info) +static void etm_os_unlock(struct etm_drvdata *drvdata) { - struct etm_drvdata *drvdata = (struct etm_drvdata *)info; /* Writing any value to ETMOSLAR unlocks the trace registers */ etm_writel(drvdata, 0x0, ETMOSLAR); + drvdata->os_unlock = true; isb(); } @@ -483,6 +483,9 @@ static void etm_init_arch_data(void *info) u32 etmccr; struct etm_drvdata *drvdata = info; + /* Make sure all registers are accessible */ + etm_os_unlock(drvdata); + CS_UNLOCK(drvdata->base); /* First dummy read */ @@ -607,9 +610,6 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) get_online_cpus(); etmdrvdata[drvdata->cpu] = drvdata; - if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1)) - drvdata->os_unlock = true; - if (smp_call_function_single(drvdata->cpu, etm_init_arch_data, drvdata, 1)) dev_err(dev, "ETM arch init failed\n");