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[209.132.180.67]) by mx.google.com with ESMTP id zr12si14871088pab.241.2016.02.06.03.06.40; Sat, 06 Feb 2016 03:06:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752518AbcBFLGj (ORCPT + 30 others); Sat, 6 Feb 2016 06:06:39 -0500 Received: from mail-pf0-f176.google.com ([209.85.192.176]:33334 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752353AbcBFLGf (ORCPT ); Sat, 6 Feb 2016 06:06:35 -0500 Received: by mail-pf0-f176.google.com with SMTP id w123so83354031pfb.0 for ; Sat, 06 Feb 2016 03:06:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JPMkKb/ZNkjTmppkRAdYf23PWZMo/NFHNJm5LC5Eug8=; b=Sm37coR6NQUyg7egVVLv6s+94BqVzly3ee7pLSPirhFLjKo48lIxiBRW0fcP4yoTh0 fZQAxPZkyH8ArHiAbbGZVbmLq9/4gErvg77MJpZgmkkSDl2ywykL06lKC5VZ09pnP8Lb HQEyBaKjWhMMkQDT1Aoh5Vy5DqRXd+R97ebCY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JPMkKb/ZNkjTmppkRAdYf23PWZMo/NFHNJm5LC5Eug8=; b=HlxDzWdWQ6CSXjh2u15FJBde8IFx+KwVuTQ8G451PFHkG3IS3ATEuFPuZ2UzqxG/9E 9HEb7v/if69DBVPUjQJZy6vkjJeYE+luP27g7bF1PzgcOSLLkPOs9U7Xy+0Wl3JrVhJ3 TxD/UAaXIKmkENilwagVQASgL5ZtTX6AwuzPe272bik1XeH6enrLJcP2xGfOYR+/6TJO Bdl1pPRqvtnd9LE3ggEM+YBL8qBDpDNnIhtaGrMKiYX0Y8U9FahPLu996baOmM44Lfz1 UKjiHiQ3rp8ed7Eb+6DwrgkBnrm01zXtTXOq+Y4bG6o1CUOYrh6Tjic7lhUwko+RQntt /o1w== X-Gm-Message-State: AG10YOQ2H8YkgoR18AOATrNRalf66DqSMgzkrPoE3CAC1hXuL4pnF6WSVTrXBstNpagVP/Y/ X-Received: by 10.98.68.220 with SMTP id m89mr26640030pfi.65.1454756794842; Sat, 06 Feb 2016 03:06:34 -0800 (PST) Received: from zcy-ubuntu.spreadtrum.com ([175.111.195.49]) by smtp.gmail.com with ESMTPSA id p21sm30500690pfj.67.2016.02.06.03.06.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 06 Feb 2016 03:06:33 -0800 (PST) From: Chunyan Zhang To: mathieu.poirier@linaro.org, alexander.shishkin@linux.intel.com Cc: mike.leach@arm.com, Michael.Williams@arm.com, al.grant@arm.com, tor@ti.com, nicolas.guion@st.com, broonie@kernel.org, robh@kernel.org, pratikp@codeaurora.org, corbet@lwn.net, mark.rutland@arm.com, zhang.lyra@gmail.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-api@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH V3 5/6] coresight-stm: Bindings for System Trace Macrocell Date: Sat, 6 Feb 2016 19:04:31 +0800 Message-Id: <1454756672-12790-6-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454756672-12790-1-git-send-email-zhang.chunyan@linaro.org> References: <1454756672-12790-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mathieu Poirier The System Trace Macrocell (STM) is an IP block falling under the CoreSight umbrella. It's main purpose it so expose stimulus channels to any system component for the purpose of information logging. Bindings for this IP block adds a couple of items to the current mandatory definition for CoreSight components. Signed-off-by: Mathieu Poirier Acked-by: Rob Herring Signed-off-by: Chunyan Zhang --- .../devicetree/bindings/arm/coresight.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 1.9.1 diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index 62938eb..93147c0c 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -19,6 +19,7 @@ its hardware characteristcs. - "arm,coresight-etm3x", "arm,primecell"; - "arm,coresight-etm4x", "arm,primecell"; - "qcom,coresight-replicator1x", "arm,primecell"; + - "arm,coresight-stm", "arm,primecell"; [1] * reg: physical base address and length of the register set(s) of the component. @@ -36,6 +37,14 @@ its hardware characteristcs. layout using the generic DT graph presentation found in "bindings/graph.txt". +* Additional required properties for System Trace Macrocells (STM): + * reg: along with the physical base address and length of the register + set as described above, another entry is required to describe the + mapping of the extended stimulus port area. + + * reg-names: the only acceptable values are "stm-base" and + "stm-stimulus-base", each corresponding to the areas defined in "reg". + * Required properties for devices that don't show up on the AMBA bus, such as non-configurable replicators: @@ -202,3 +211,22 @@ Example: }; }; }; + +4. STM + stm@20100000 { + compatible = "arm,coresight-stm", "arm,primecell"; + reg = <0 0x20100000 0 0x1000>, + <0 0x28000000 0 0x180000>; + reg-names = "stm-base", "stm-stimulus-base"; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + stm_out_port: endpoint { + remote-endpoint = <&main_funnel_in_port2>; + }; + }; + }; + +[1]. There is currently two version of STM: STM32 and STM500. Both +have the same HW interface and as such don't need an explicit binding name.